AD9269 16-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
The AD9269 is a monolithic, dual-channel, 1.8 V supply, 16-bit, 20/40/65/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
The AD9269 incorporates an optional integrated dc correction and quadrature error correction block (QEC) that corrects for dc offset, gain, and phase mismatch between the two channels. This functional block can be very beneficial to complex signal processing applications such as direct conversion receivers.
Applications
The ADC also contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is pro-vided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported, and output data can be multiplexed onto a single output bus.
The AD9269 is available in a 64-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
Features and Benefits- 1.8 V analog supply operation
- 1.8 V to 3.3 V output supply
- Integrated quadrature error correction (QEC)
- SNR
77.6 dBFS at 9.7 MHz input
71 dBFS at 200 MHz input - SFDR
93 dBc at 9.7 MHz input
80 dBc at 200 MHz input - Low power
44 mW per channel at 20 MSPS
100 mW per channel at 80 MSPS
- Differential input with 700 MHz bandwidth
- On-chip voltage reference and sample-and-hold circuit
- 2V p-p differential analog input
- DNL = −0.5/+1.1 LSB
- Serial port control options
- Offset binary, gray code, or twos complement data format
- Optional clock duty cycle stabilizer (DCS)
- See data sheet for additional features
| AD9269 IBIS Model
|
Data Sheets
Application Notes
User Guides
Order Information
| Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
|---|
| AD9269BCPZ-20 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 57.82 | 49 | Y |
| AD9269BCPZ-40 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 70.21 | 59.5 | Y |
| AD9269BCPZ-65 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 86.92 | 73.66 | Y |
| AD9269BCPZRL7-20 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 57.82 | 49 | Y |
| AD9269BCPZRL7-40 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 70.21 | 59.5 | Y |
| AD9269BCPZRL7-65 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 86.92 | 73.66 | Y |
| AD9269BCPZRL7-80 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 99.23 | 84.09 | Y |
Evaluation Boards
| Part Number | Description | Price | RoHS |
|---|
| AD9269-20EBZ | Evaluation Board | 200 | Y |
| AD9269-40EBZ | Evaluation Board | 200 | Y |
| AD9269-65EBZ | Evaluation Board | 200 | Y |
| AD9269-80EBZ | Evaluation Board | 200 | Y |
Reference Materials
