AD9559 Dual PLL Quad Input Multiservice Line Card Adaptive Clock Translator

The AD9559 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9559 generates an output clock synchronized to up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9559 continuously generates a low jitter output clock even when all reference inputs have failed.

The AD9559 operates over an industrial temperature range of −40°C to +85°C. If a single DPLL version of this part is needed, refer to the AD9557.

Applications
  • Network synchronization, including Synchronous Ethernet and OTN mapping/de-mapping
  • Cleanup of reference clock jitter
  • SONET/SDH clocks up to OC-192, including FEC
  • Stratum 3 holdover, jitter cleanup, and phase transient control
  • Wireless base station controllers
  • Cable infrastructure
  • Data communications
Features and Benefits
  • Supports GR-1244 Stratum 3 stability in holdover mode
  • Supports smooth reference switchover with virtually
    no disturbance on output phase
  • Supports Telcordia GR-253 jitter generation, transfer, and
    tolerance for SONET/SDH up to OC-192 systems
  • Supports ITU-T G.8262 synchronous Ethernet slave clocks
  • Supports ITU-T G.823, G.824, G.825, and G.8261
  • Auto/manual holdover and reference switchover
  • Adaptive clocking allows dynamic adjustment of feedback dividers
    for use in OTN mapping/demapping applications
  • Dual digital PLL architecture with four reference inputs
    (single-ended or differential)
  • 4x2 crosspoint allows any reference input to drive either PLL
  • Input reference frequencies from 2 kHz to 1250 MHz
  • Reference validation and frequency monitoring (2 ppm)
  • See data sheet for additional features
Clock & Timing
RF & Microwave
IBIS Models
Data Sheets
Documentnote
AD9559: Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator Data Sheet (Rev. C)PDF 1681 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9559BCPZ Production72 ld LFCSP (10x10mm, 7.1mm exposed pad) OTH 168-40 to 85C22.6619.26Y
AD9559BCPZ-REEL7 Production72 ld LFCSP (10x10mm, 7.1mm exposed pad) REEL 400-40 to 85C22.6619.26Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9559/PCBZEvaluation Board299Y
Reference Materials
AD9559: Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator Data Sheet (Rev. C) ad9559
AD9559 IBIS Model ad9559
RF Source Booklet adf9010