AD9629 12-Bit, 20/40/65/80 MSPS, 1.8 V Analog-to-Digital Converter

The AD9629 is a monolithic, single channel 1.8 V supply, 12- Bit, 20/40/65/80 MSPS analog-to-digital converter (ADC), featuring a high performance sample-and-hold circuit and onchip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 12-Bit accuracy at 80 MSPS data rates and guarantees no missing codes over the full operating temperature range. Applications Product Highlights The AD9629 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface (SPI) supports various product features and functions, such as data output format-ting, internal clock divider, power-down, DCO and data output (D11 to D0) timing and offset adjustments, and voltage reference modes. The AD9629 is packaged in a 32-lead RoHS compliant LFCSP that is pin compatible with the AD9609 10-bit ADC and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 14-bit converters sampling from 20 MSPS to 80 MSPS.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. The AD9629 is available in a 32-lead Pb-free LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

Features and Benefits
  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • SNR = 70 dBFs at 9.7 MHz input
  • SFDR = 90 dBc at 9.7 MHz input
  • Low power: 44 mW @ 20MSPS
    86 mW @ 80MSPS
  • Differential input with 700 MHz bandwidth
  • On-chip voltage reference and sample-and-hold circuit
  • DNL = ±0.2 LSB
  • Flexible analog input: 1 V p-p or 2 V p-p differential
  • Offset binary, Gray code, or twos complement data format
  • Optional clock duty cycle stabilizer
  • See data sheet for additional features
Analog to Digital Converters
Reference Designs
Data Sheets
Documentnote
AD9629: 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet (Rev. A)PDF 1922 kB
Application Notes
Documentnote
AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)
Software Download (zip, 21,702,560 bytes)
PDF 441 kB
User Guides
Documentnote
Evaluating the AD9266/AD9649/AD9629/AD9609 Analog-to-Digital ConvertersWIKI
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9629BCPZ-20 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padOTH 490-40 to 85C6.185.25Y
AD9629BCPZ-40 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padOTH 490-40 to 85C8.066.85Y
AD9629BCPZ-65 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padOTH 490-40 to 85C14.2112.08Y
AD9629BCPZ-80 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padOTH 490-40 to 85C19.6516.7Y
AD9629BCPZRL7-20 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padREEL 1500-40 to 85C05.25Y
AD9629BCPZRL7-40 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padREEL 1500-40 to 85C06.85Y
AD9629BCPZRL7-65 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padREEL 1500-40 to 85C012.08Y
AD9629BCPZRL7-80 Production32 ld LFCSP (5x5x.85mm) w/3.5exposed padREEL 1500-40 to 85C016.7Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9629-20EBZEvaluation Board200Y
AD9629-40EBZEvaluation Board200Y
AD9629-65EBZEvaluation Board200Y
AD9629-80EBZEvaluation Board200Y
Reference Materials
AD9629: 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet (Rev. A) ad9629
CN0272 设计和集成文件 ad8475
AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0) ad6642
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-586: 高速模数转换器的LVDS数据输出[中文版] (Rev. 0) ad6642
AN-812: 基于微控制器的串行端口接口(SPI®)启动电路 (Rev. 0) adg3304
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0) ad6655
Software Download (zip, 21,702,560 bytes) ad6655
CN-0272:具有暗电流补偿功能的2 MHz带宽PIN光电二极管前置放大器 ad8475
MS-2210:高速ADC的电源设计 ad9861