AD9633 Quad, 12-Bit, 80/105/125 MSPS Serial LVDS 1.8 V A/D Converter

The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). The AD9633 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. APPLICATIONS Medical ultrasound High speed imaging Quadrature radio receivers Diversity radio receivers Test equipment

The AD9633 is a quad, 12-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital con­verter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.

The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

The AD9633 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.

APPLICATIONS
  • Medical ultrasound
  • High speed imaging
  • Quadrature radio receivers
  • Diversity radio receivers
  • Test equipment
Features and Benefits
  • 1.8 V supply operation
  • Low power: 100 mW per channel at 125 MSPS with scalable power options
  • SNR = 71 dB (to Nyquist)
  • SFDR = 91 dBc (to Nyquist)
  • DNL = ±0.3 LSB (typical)
  • INL = ±0.5 LSB (typical)
  • Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
  • 650 MHz full power analog bandwidth
  • 2 V p-p input voltage range
  • Serial port control
    - See data sheet for additional features
Analog to Digital Converters
Data Sheets
Documentnote
AD9633: Quad, 12-Bit, 80 MSPS/105 MSPS/125 MSPS, Serial LVDS 1.8 V ADC Data Sheet (Rev. B)PDF 1909 kB
Application Notes
Documentnote
AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
User Guides
Documentnote
Evaluating the AD9253/AD9633/AD9653 Analog-to-Digital ConvertersWIKI
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9633BCPZ-105 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)OTH 260-40 to 85C6857.8Y
AD9633BCPZ-125 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)OTH 260-40 to 85C80.668.51Y
AD9633BCPZ-80 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)OTH 260-40 to 85C5244.2Y
AD9633BCPZRL7-105 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)REEL 750-40 to 85C6857.8Y
AD9633BCPZRL7-125 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)REEL 750-40 to 85C80.668.51Y
AD9633BCPZRL7-80 Production48 ld LFCSP (7x7x.85mm w/5.6mm Pad)REEL 750-40 to 85C5244.2Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9633-125EBZEvaluation Board250Y
Reference Materials
AD9633: Quad, 12-Bit, 80 MSPS/105 MSPS/125 MSPS, Serial LVDS 1.8 V ADC Data Sheet (Rev. B) ad9633
AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
MS-2210:高速ADC的电源设计 ad9861