AD9993 Integrated Mixed Signal Front End MxFE

The AD9993 is a mixed-signal front-end (MxFE®) device that integrates four 14-bit ADCs and two 14-bit DACs. Figure 1 shows the block diagram of the MxFE. The MxFE is programmable using registers accessed via a serial peripheral interface (SPI). ADC and DAC datapaths include FIFO buffers to absorb phase differences between LVDS lane clocks and the data converter sampling clocks.

The MxFE DACs are part of the Analog Devices, Inc., high speed CMOS DAC core family. These DACs are designed to be used in wide bandwidth communication system transmitter (Tx) signal chains.

The MxFE ADCs are multistage pipelined CMOS ADC cores designed for use in communications receivers.

APPLICATIONS
  • Point to point microwave backhaul radio
  • Wireless repeaters
Features and Benefits
  • Quad 14-bit 250 MSPS ADC:
    SFDR = 83 dBc at 87 MHz input
  • Dual 14-bit 500 MSPS DAC:
    SFDR = 75 dBc at 20 MHz output
  • On Chip PLL Clock Synthesizer
  • Low Power:
    1536 mW, 1 GHz master clock, on-chip synthesizer
  • 500 MHz double data rate (DDR)
  • LVDS Interfaces for DACs and ADCs
  • Small 12 mm × 12 mm lead-free BGA package
RF & Microwave
IBIS Models
Data Sheets
Documentnote
AD9993: Integrated Mixed-Signal Front End (MxFE) Data Sheet (Rev. A)PDF 2469 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9993BBCZ ProductionCHIP SCALE BGAOTH 189-40 to 85C174.94148.7Y
AD9993BBCZRL ProductionCHIP SCALE BGAREEL 1500-40 to 85C0148.7Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9993-EBZEvaluation Board495Y
AD9993: Integrated Mixed-Signal Front End (MxFE) Data Sheet (Rev. A) ad9993
AD9993 IBIS Model ad9993