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ADF4116 Single, Integer-N 550 MHz PLL

The ADF4116/ADF4117/ADF4118 are frequency synthesizers which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They consist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).

Control of all the on-chip registers is via a simple 3-wire interface.

The devices operate with a 2.7V (± 10%) or 5V (± 10%) power supply and can be powered when not in use.

Data Sheets

Application Notes

User Guides

Frequently Asked Questions

Order Information

Evaluation Boards

Reference Materials

• Product Selection Guide：RF Source Booklet
• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 1
• Technical Articles：Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 2
• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 3