ADL5205 Dual, 35 dB Range, 1 dB Step Size DGA _ BDTIC a Leading Distributor in China

ADL5205 Dual, 35 dB Range, 1 dB Step Size DGA

The ADL5205 is a digitally controlled, wide bandwidth, variable gain dual amplifier (DGA) that provides precise gain control, high output third-order intercept (OIP3) and a near constant noise figure for the first 12 dB of attenuation. The excellent OIP3 performance of 48.5 dBm (at 200 MHz, 5 V, high performance mode, and maximum gain) makes the ADL5205 an excellent gain control device for a variety of receiver applications.

For wide input dynamic range applications, the ADL5205 provides a broad 35 dB gain range with a 1 dB step size. The gain is adjustable through multiple gain control and interface options: parallel, SPI, or gain step up/down control.

The two channels of the ADL5205 can be powered up independently by applying the appropriate logic level to the PWUPA and PWUPB pins. The quiescent current of the ADL5205 is typically 175 mA for high performance mode and 135 mA for low power mode. When disabled, the ADL5205 consumes only 14 mA and offers excellent input to output isolation. The gain setting is preserved when the device is disabled.

Fabricated on the Analog Devices, Inc., high speed, silicon germanium (SiGe) complementary BiCMOS process, the ADL5205 provides precise gain adjustment capabilities with good distortion performance. The ADL5205 amplifier comes in a compact, thermally enhanced, 6 mm × 6 mm, 40-lead LFCSP package and operates over the temperature range of −40°C to +85°C.

Note that throughout this data sheet, multifunction pins, such as CSA/A3, are referred to by the entire pin name or by a single function of the pin, for example, CSA, when only that function is relevant.

Applications

Features and Benefits

Dual, independent, digitally controlled gain amplifier(DGA)

−9 dB to +26 dB gain range

1 dB step size, ±0.2 dB accuracy at 200 MHz

100 Ω differential input resistance

10 Ω differential output resistance

1.2 dB change in noise figure for first 12 dB of gain reduction

Output third-order intercept (OIP3): 48.5 dBm at 200 MHz, 5V, high performance mode

−3 dB bandwidth: 1700 MHz typical in high performance mode

Multiple control interface options

Parallel 6-bit control interface with latch
Serial peripheral interface (SPI) with fast attack
Gain step up/down interface

Parallel 6-bit control interface with latch

Serial peripheral interface (SPI) with fast attack

Gain step up/down interface

Wide input dynamic range

Low power mode

Power-down control

Single 3.3 V or 5 V supply operation

40-lead, 6 mm × 6 mm LFCSP package

RF & Microwave

S-Parameters

ADL5205 S-Parameters .ZIP

Data Sheets

Document	note
ADL5205: Dual, 35 dB Range, 1 dB Step Size DGA Data Sheet (Rev. 0)	PDF 1.59 M

Application Notes

Document	note
AN-1363: Meeting Biasing Requirements of Externally Biased RF/Microwave Amplifiers with Active Bias Controllers (Rev. 0)	PDF 804.11 K

Order Information

Part Number	Package	Packing Qty	Temp Range	Price 100-499	Price 1000+	RoHS
ADL5205ACPZ-R7 Production	40 ld LFCSP (6x6mm w_2.9mm EP)	REEL 750	-40 to 85C	0	10.2	Y

Evaluation Boards

Part Number	Description	Price	RoHS
ADL5205-EVALZ	Evaluation Board	150	Y
EVAL-SDP-CS1Z	SDP-S Controller Board - Interface to ADL5205-EVALZ (also required)	49	Y

ADL5205: Dual, 35 dB Range, 1 dB Step Size DGA Data Sheet (Rev. 0) adl5205

ADL5205 S-Parameters adl5205

AN-1363: 利用有源偏置控制器满足外部偏置射频/微波放大器的偏置要求 (Rev. 0) hmc8120

AN-1363: Meeting Biasing Requirements of Externally Biased RF/Microwave Amplifiers with Active Bias Controllers (Rev. 0) hmc8120