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Home > Fairchild Semiconductor > Power Management > FAN7383

FAN7383: 625V,0.65/0.35A sink/source current, Half Bridge Gate-Drive with variable Deadtime, Shutdown protection

The FAN7383 is a half-bridge gate-drive IC with shutdown and programmable dead-time control functions for driving MOSFETs and IGBTs that operate up to +600V. Fairchild’s high voltage process and common-mode noise canceling technique give stable operation of highside drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS= -9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half and full bridge inverter.

FAN7383 Datasheet
Features
  • Floating Channel for Bootstrap Operation to +600V
  • Typically 350mA/650mA Sourcing/Sinking CurrentDriving Capability for Both Channels
  • Extended Allowable Negative VS Swing to -9.8V forSignal Propagation at VDD<=VBS=15V
  • High-Side Output in Phase of IN Input Signal
  • Built-in UVLO Functions for Both Channels
  • Built-in Common-Mode dv/dt Noise Canceling Circuit
  • Typically Internal 330nsec Minimum Dead Time
  • Programmable Turn-on Delay-Time Control(Dead-Time)
Ordering Code
ProductProduct & Eco StatusUnit Price/1K OrderPacking Method ConventionPackage Marking Convention*
FAN7383MObsolete as of 21-Sep-2011 ROHS Compliant as of 27-Feb-2006 Replacement Part: FAN7383MX  China RoHSN/ASOP 14L  -  1.8 x 5.3 x 10.2mm,  RAIL
  • SOP 14L  Drawing Last Update: Nov 2015
  • M14D SOP EIAJ 14L, Packing Drawing Last Update: Jan 2016
  • SOIC 14L PACKING DRAWING Last Update: May 2013
  • SOIC TUBE Packing Drawing Last Update: Dec 2016
Line 17383

FAN7383MXFull Production ROHS Compliant as of 27-Feb-2006  China RoHS$0.78SOP 14L  -  1.8 x 5.3 x 10.2mm,  TAPE REEL
  • SOP 14L  Drawing Last Update: Nov 2015
  • M14D SOP EIAJ 14L, Packing Drawing Last Update: Jan 2016
  • SOIC 14L PACKING DRAWING Last Update: May 2013
  • SOIC TUBE Packing Drawing Last Update: Dec 2016
Line 17383

Line 2&E (Space)
&Z (Plant Code)
&3 (3-Digit Date Code)
&K

Application Notes
  • AN-9052 Design Guide for Selection of Bootstrap Components Last Update : 28-Jun-2011
  • AN-8102 Recommendations to Avoid Short Pulse Width Issues in HVIC Gate Driver Applications Last Update : 01-May-2015
  • AN-6076 Design and Application Guide of Bootstrap Circuit for High-Voltage Gate-Drive IC Last Update : 19-Dec-2014
  • FAN7383.pdf
    Recommendations to Avoid Short Pulse Width Issues in HVIC Gate Driver Applications Last Update : 01-May-2015
    Design and Application Guide of Bootstrap Circuit for High-Voltage Gate-Drive IC Last Update : 19-Dec-2014
    SOP 14L  Drawing Last Update: Nov 2015
    M14D SOP EIAJ 14L, Packing Drawing Last Update: Jan 2016
    SOIC 14L PACKING DRAWING Last Update: May 2013
    SOIC TUBE Packing Drawing Last Update: Dec 2016
    Design Guide for Selection of Bootstrap Components Last Update : 28-Jun-2011
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