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Home > Fairchild Semiconductor > FET > FDS8840NZ

FDS8840NZ: 40V N-Channel PowerTrench® MOSFET

The FDS8840NZ has been designed to minimize losses in power conversion application. Advancements in both silicon and package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance.

FDS8840NZ Datasheet
Features
  • Max rDS(on) = 4.5 mΩ at VGS = 10 V, ID = 18.6 A
  • Max rDS(on) = 6.0 mΩ at VGS = 4.5 V, ID = 14.9 A
  • HBM ESD protection level of 6 kV typical(note 3)
  • High performance trench technology for extremely low rDS(on) and fast switching
  • High power and current handling capability
  • Termination is Lead-free and RoHS Compliant
Ordering Code
ProductProduct & Eco StatusUnit Price/1K OrderPacking Method ConventionPackage Marking Convention*
FDS8840NZFull Production Green as of Jun 2008  China RoHS$0.7794SO 8L NB  -  1.75 x 3.9 x 4.9mm,  TAPE REEL
  • SO 8L NB  Drawing Last Update: Nov 2015
  • MO8A SON8, Packing Drawing Last Update: Oct 2015
  • SOIC 8L TR packing drawing Last Update: May 2013
  • SOIC 8L PACKING DRAWING Last Update: May 2013
  • SOIC 8L PACKING DRAWING Last Update: May 2013
  • SOIC Tape And Reel Packing Drawing Last Update: Jun 2016
Line 1$Y (Fairchild logo)
&Z (Plant Code)
&2 (2-Digit Date Code)
&K

Line 2FDS

Line 38840NZ

Application Notes
  • AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
  • AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
  • AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
  • AN-9010 MOSFET Basics Last Update : 09-Sep-2013
  • AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
  • AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
  • AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
  • AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
  • AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
  • FDS8840NZ.pdf
    MOSFET Basics Last Update : 09-Sep-2013
    A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
    FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
    Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
    Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
    SO 8L NB  Drawing Last Update: Nov 2015
    MO8A SON8, Packing Drawing Last Update: Oct 2015
    SOIC 8L TR packing drawing Last Update: May 2013
    SOIC 8L PACKING DRAWING Last Update: May 2013
    SOIC 8L PACKING DRAWING Last Update: May 2013
    SOIC Tape And Reel Packing Drawing Last Update: Jun 2016
    A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
    A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
    Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
    Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
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