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Home > Fairchild Semiconductor > FET > FDV304P

FDV304P: P-Channel Digital FET

This P-Channel enhancement mode field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook computers and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts.

FDV304P Datasheet
Features
  • -25 V, -0.46 A continuous, -1.5 A Peak. RDS(ON) = 1.1 Ω @ VGS = -4.5 V, RDS(ON) = 1.5 Ω @ VGS= -2.7 V.
  • Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V.
  • Gate-Source Zener for ESD ruggedness. >6kV Human Body Model.
  • Compact industry standard SOT-23 surface mount package.
Ordering Code
ProductProduct & Eco StatusUnit Price/1K OrderPacking Method ConventionPackage Marking Convention*
FDV304PFull Production Green as of Jan 2013  China RoHS$0.0247SOT-23 3L  -  1.2 x 2.92 x 1.3mm,  TAPE REEL
  • SOT-23 3L  Drawing Last Update: Apr 2016
  • SOT Tape and Reel Packing Drawing Last Update: Oct 2016
Line 1&E (Space)
&Y (Binary Calendar Year Coding)

Line 2304&E (Space)
&G (Weekly Date Code)

Application Notes
  • AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
  • AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
  • AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
  • AN-9010 MOSFET Basics Last Update : 09-Sep-2013
  • AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
  • AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
  • AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
  • AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
  • AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
  • FDV304P.pdf
    Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
    MOSFET Basics Last Update : 09-Sep-2013
    A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
    FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
    Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
    SOT-23 3L  Drawing Last Update: Apr 2016
    SOT Tape and Reel Packing Drawing Last Update: Oct 2016
    Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
    A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
    A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
    Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
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