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Home > Fairchild Semiconductor > FET > FQP12P10

FQP12P10: P-Channel QFET® MOSFET -100V, -11.5A, 290mΩ

These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for lowvoltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control.

FQP12P10 Datasheet
Features
  • -11.5 A, -100 V, RDS(on) = 290 mΩ (Max.) @ VGS = -10 V, ID = -5.75 A
  • Low Gate Charge (Typ. 21 nC)
  • Low Crss (Typ. 65 pF)
  • 100% Avalanche Tested
  • 175oC Maximum Junction Temperature Rating
Ordering Code
ProductProduct & Eco StatusUnit Price/1K OrderPacking Method ConventionPackage Marking Convention*
FQP12P10Full Production ROHS Compliant as of 27-Feb-2006  China RoHS$0.6804TO-220 3L  -  4.83 x 10.16 x 8.89mm,  RAIL
  • TO-220 3L  Drawing Last Update: Nov 2015
  • TO220-3L, JEDEC VARIATION, PACKING DRAWING Last Update: Oct 2013
  • TO Tube Packing Drawing Last Update: Sep 2015
  • TO Vacuum Packing Drawing Last Update: Sep 2015
Line 1$Y (Fairchild logo)
&Z (Plant Code)
&3 (3-Digit Date Code)
&K

Line 2FQP

Line 312P10

Application Notes
  • AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
  • AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
  • AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
  • AN-9010 MOSFET Basics Last Update : 09-Sep-2013
  • AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
  • AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
  • AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
  • AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
  • AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
  • FQP12P10.pdf
    Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
    MOSFET Basics Last Update : 09-Sep-2013
    A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
    FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
    Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
    TO-220 3L  Drawing Last Update: Nov 2015
    TO220-3L, JEDEC VARIATION, PACKING DRAWING Last Update: Oct 2013
    TO Tube Packing Drawing Last Update: Sep 2015
    TO Vacuum Packing Drawing Last Update: Sep 2015
    Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
    A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
    A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
    Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
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