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Home > Fairchild Semiconductor > FET > RFD14N05L

RFD14N05L: N-Channel Logic Level Power MOSFET 50V, 14A, 100mΩ

These are N-channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers. This performance is accomplished through a special gate oxide design which provides full rated conductance at gate bias in the 3V-5V range, thereby facilitating true on-off power control directly from logic level (5V) integrated circuits. Formerly developmental type TA09870.

RFD14N05L Datasheet
Features
  • 14A, 50V
  • rDS(ON)= 0.100Ω
  • Temperature Compensating PSPICE® Model
  • Can be Driven Directly from CMOS, NMOS, andTTL Circuits
  • Peak Current vs Pulse Width Curve
  • UIS Rating Curve
  • 175°C Operating Temperature
  • Related Literature
  • TB334 “Guidelines for Soldering Surface MountComponents to PC Boards”
Ordering Code
ProductProduct & Eco StatusUnit Price/1K OrderPacking Method ConventionPackage Marking Convention*
RFD14N05LFull Production ROHS Compliant as of 27-Feb-2006  China RoHS$0.5461TO-251 3L (IPAK)  -  2.5 x 6.8 x 17.22mm,  RAIL
  • TO-251 3L (IPAK)  Drawing Last Update: May 2016
  • TO251-3L (IPAK), OPTION AA, PACKING DRAWING Last Update: May 2013
Line 1$Y (Fairchild logo)
&Z (Plant Code)
&3 (3-Digit Date Code)
&K

Line 214N05L

Application Notes
  • AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
  • AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
  • AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
  • AN-9010 MOSFET Basics Last Update : 09-Sep-2013
  • AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
  • AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
  • AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
  • AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
  • AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
  • RFD14N05L.pdf
    MOSFET Basics Last Update : 09-Sep-2013
    A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011
    FRFET® in Synchronous Rectification Last Update : 28-Jun-2014
    Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014
    Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011
    TO-251 3L (IPAK)  Drawing Last Update: May 2016
    TO251-3L (IPAK), OPTION AA, PACKING DRAWING Last Update: May 2013
    Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014
    A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011
    A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011
    Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016
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