CD4081BMS: CMOS AND Gate

CD4073BMS, CD4081BMS and CD4082BMS AND gates provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.

Key Features
  • High-Voltage Types (20V Rating)
  • CD4073BMS Triple 3-Input AND Gate
  • CD4081BMS Quad 2-Input AND Gate
  • CD4082BMS Dual 4-Input AND Gate
  • Medium Speed Operation:
    • tPLH, tPHL = 60ns (typ) at VDD = 10V
  • 100% Tested for Quiescent Current at 20V
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
  • Noise Margin (Over Full Package Temperature Range):
    • 1V at VDD = 5V
    • 2V at VDD = 10V
    • 2.5V at VDD = 15V
  • Standardized Symmetrical Output Characteristics
  • 5V, 10V and 15V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9867: End of Life Derating: A Necessity or Over KillPDF13 Nov 201435 KB
AN9654: Use of Life Tested PartsPDF13 Nov 201458 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
CD4073BMS, CD4081BMS, CD4082BMS DatasheetPDF27 Oct 2015228 KB
Standard Microcircuit Drawings
TitleTypeUpdatedSizeOther Languages
SMD 5962-96655 (CD4073BMS, CD4081BMS, CD4082BMS)PDF12 Jan 2015
Miscellaneous
TitleTypeUpdatedSizeOther Languages
Intersil Commercial Lab ServicesPDF18 Nov 2014364 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
CD4081BDMSR14 Ld SBDIP1.2914N/ANARoHS
CD4081BKMSR14 Ld CFP0.614N/ANARoHS
CD4081BKNSR14 Ld CFP0.614N/ANARoHS
CD4073BMS, CD4081BMS, CD4082BMS Datasheet 27 Oct 2015
14 Ld SBDIP HS-303ARH
14 Ld CFP HS-303ARH
CD4073BMS
AN9867: End of Life Derating: A Necessity or Over Kill 13 Nov 2014
AN9654: Use of Life Tested Parts 13 Nov 2014
SMD 5962-96655 (CD4073BMS, CD4081BMS, CD4082BMS) 12 Jan 2015
Intersil Commercial Lab Services 18 Nov 2014