HSP43168: Dual FIR Filter

The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR cells each fed by a separate coefficient bank and one of two separate inputs. The outputs of the FIR cells are either summed or multiplexed by the MUX/Adder. The compute power in the FIR Cells can be configured to provide quadrature filtering, complex filtering, 2-D convolution, 1-D/2-D correlations, and interpolating/decimating filters.

The FIR cells take advantage of symmetry in FIR coefficients by pre-adding data samples prior to multiplication. This allows an 8-tap FIR to be implemented using only 4 multipliers per filter cell. These cells can be configured as either a single 16-tap FIR filter or dual 8-tap FIR filters. Asymmetric filtering is also supported.

Decimation of up to 16 is provided to boost the effective number of filter taps from 2 to 16 times. Further, the Decimation Registers provide the delay necessary for fractional data conversion and 2-D filtering with kernels to 16x16.

The flexibility of the Dual is further enhanced by 32 sets of user programmable coefficients. Coefficient selection may be changed asynchronously from clock to clock. The ability to toggle between coefficient sets further simplifies applications such as polyphase or adaptive filtering. The HSP43168 is a low power fully static design implemented in an advanced CMOS process. The configuration of the device is controlled through a standard microprocessor interface.

Key Features
  • Two Independent 8-Tap FIR Filters Configurable as a Single 16-Tap FIR
  • 10-Bit Data and Coefficients
  • On-Board Storage for 32 Programmable Coefficient Sets
  • Up To: 256 FIR Taps, 16x16 2-D Kernels, or 10x19-Bit Data and Coefficients
  • Programmable Decimation to 16
  • Programmable Rounding on Output
  • Standard Microprocessor Interface
  • Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
  • Quadrature, Complex Filtering
  • Image Processing
  • Polyphase Filtering
  • Adaptive Filtering
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9661: Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF)PDF13 Nov 201456 KB
AN9658: Implementation of a High Rate Radio ReceiverPDF13 Nov 2014166 KB
AN9603: An Introduction to Digital FiltersPDF13 Nov 201484 KB
AN9421: HSP43168 Configured to Perform Multi-Channel FilteringPDF13 Nov 2014277 KB
AN9418: Complex Filtering with the HSP43168 Dual FIR FilterPDF13 Nov 201443 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
HSP43168 DatasheetPDF16 Jul 2015686 KB
Tech Briefs
TitleTypeUpdatedSizeOther Languages
TB336: 3x3 10-Bit Convolver Using the HSP43168PDF19 Nov 201410 KB
TB314: Quadrature Down Conversion with the HSP45115, HSP43168 and HSP43220PDF19 Nov 201452 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
HSP43168JC-3384 Ld PLCC7.1844225
HSP43168JC-33Z84 Ld PLCC7.1844245RoHS
HSP43168JI-4084 Ld PLCC7.1844225
HSP43168VC-33100 Ld MQFPNA1004225
HSP43168VC-40100 Ld MQFPNA1004225
HSP43168VC-45100 Ld MQFP1.71004225
HSP43168VC-45Z100 Ld MQFP1.71003NARoHS
HSP43168 Datasheet 16 Jul 2015
84 Ld PLCC HSP45106
100 Ld MQFP HSP50415
HSP43168
AN9661: Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF) 13 Nov 2014
AN9658: Implementation of a High Rate Radio Receiver 13 Nov 2014
AN9603: An Introduction to Digital Filters 13 Nov 2014
AN9421: HSP43168 Configured to Perform Multi-Channel Filtering 13 Nov 2014
AN9418: Complex Filtering with the HSP43168 Dual FIR Filter 13 Nov 2014
TB336: 3x3 10-Bit Convolver Using the HSP43168 19 Nov 2014
TB314: Quadrature Down Conversion with the HSP45115, HSP43168 and HSP43220 19 Nov 2014