KAD5612P-21: 12-Bit, 210MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs

The KAD5612P is a family of low-power, high-performance, dual-channel 12-bit, analog-to-digital converters. Designed with FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5612P-25 is the fastest member of this pin-compatible family, which also features sample rates of 210MSPS (KAD5612P-21), 170MSPS (KAD5612P-17) and 125MSPS (KAD5612P-12).

A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of gain, skew and offset matching between the two converter cores.

Digital output data is presented in selectable LVDS or CMOS formats. The KAD5612P is available in a 72 Ld QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).

Key Features
  • Programmable gain, offset and skew control
  • 1.3GHz analog input bandwidth
  • 60fs clock jitter
  • Over-range indicator
  • Selectable clock divider: ÷1, ÷2 or ÷4
  • Clock phase selection
  • Nap and sleep modes
  • Two’s complement, gray code or binary data format
  • DDR LVDS-compatible or LVCMOS outputs
  • Programmable built-in test patterns
  • Single-supply 1.8V operation
  • Pb-free (RoHS compliant) Key Specifications
  • SNR = 66.0dBFS for fIN = 105MHz (-1dBFS)
  • SFDR = 86.0dBc for fIN = 105MHz (-1dBFS)
  • Power consumption
    • 429mW at 250MSPS
    • 342mW at 125MSPS
Applications
  • Power amplifier linearization
  • Radar and satellite antenna array processing
  • Broadband communications
  • High-performance data acquisition
  • Communications test equipment
  • WiMAX and microwave receivers
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN9705: A Theoretical View of Coherent SamplingPDF13 Nov 201425 KB
AN9675: Coherent and Windowed Sampling with A/D ConvertersPDF13 Nov 2014160 KB
AN1609: Word Error Rate Measurement Methodology and Characterization ResultsPDF13 Nov 2014114 KB
AN002: Principles of Data Acquisition and ConversionPDF13 Nov 2014257 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
KAD5612P DatasheetPDF26 May 2016752 KB
Design Files
TitleTypeUpdatedSizeOther Languages
KMB001 Evaluation Board Schematics and LayersPDF18 Nov 2014956 KB
KAD5612 Evaluation Board Schematics and LayersPDF18 Nov 2014591 KB
KMB-001CEVALZ Design FilesZIP----4.49 MB
Software
TitleTypeUpdatedSizeOther Languages
MATLAB Component Runtime installerEXE31 Oct 2014162.95 MB
Intersil Konverter Analyzer installerEXE31 Oct 20141 MB
User Guides
TitleTypeUpdatedSizeOther Languages
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User GuidePDF12 May 2015827 KB
FMC ADC Evaluation Board User GuidePDF12 May 2015340 KB
Konverter Analyzer User GuidePDF13 Nov 2014420 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
KAD5612P-21Q7272 Ld QFN0.242723260RoHS
KMB-FMC-EVALZN/ARoHS
KMB-001LEVALZN/ARoHS
KDC5612EVALN/A
KMB001CEVALN/A
KMB-001CEVALZN/A
KAD5612P Datasheet 26 May 2016
72 Ld QFN ISLA112P25M
IBIS Model for KAD5612P Family 10 Nov 2014
AN9705: A Theoretical View of Coherent Sampling 13 Nov 2014
AN9675: Coherent and Windowed Sampling with A/D Converters 13 Nov 2014
AN1609: Word Error Rate Measurement Methodology and Characterization Results 13 Nov 2014
AN002: Principles of Data Acquisition and Conversion 13 Nov 2014
KMB001 Evaluation Board Schematics and Layers 18 Nov 2014
KAD5612 Evaluation Board Schematics and Layers 18 Nov 2014
KMB-001CEVALZ Design Files ----
MATLAB Component Runtime installer 31 Oct 2014
Intersil Konverter Analyzer installer 31 Oct 2014
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User Guide 12 May 2015
FMC ADC Evaluation Board User Guide 12 May 2015
Konverter Analyzer User Guide 13 Nov 2014