Jun 19th 2014
The Terasic TR5-F40W Stratix V GX FPGA Development Kit provides the ideal hardware platform for developing high-performance and high-bandwidth application. With a standard-height, half-length form-factor package, the TR5-F40W is designed for the most demanding high-end applications, empowered with the top-of-the-line Altera Stratix V GX, delivering the best system-level integration and flexibility in the industry.
The Stratix® V GX FPGA features 340K logic elements and integrated transceivers that transfer at a maximum of 12.5 Gbps, allowing the TR5-F40W to be fully compliant with version 3.0 of SATA, version 3.0 of the PCI Express standard, as well as allowing an ultra low-latency, straight connections to four external 10G SFP+ modules. Not relying on an external PHY will accelerate mainstream development of network applications enabling customers to deploy designs for a broad range of high-speed connectivity applications. An HSMC expansion port also allows users to connect custom daughter cards such as those found on cards.terasic.com. The feature-set of the TR5-F40W fully supports all high-intensity applications such as low-latency trading, cloud computing, high-performance computing, data acquisition, network processing, and signal processing.
TR5-F40W Dev Kit
TR5-F40W Power Tree
Linear Technology Components
LTC4357 Positive High Voltage Ideal Diode Controller
LTM4628 Dual 8 A/Single 16 A DC/DC μModule.
LTM4601 12 A μModule regulator with PLL, output tracking and Margining.
LTM4612 Ultralow-noise, 36 VIN, 15 VOUT, 5 A, DC/DC μModule regulator.
LTC3025-1 500mA Micropower VLDO Linear Regulator.
LT3080-1 Parallelable 1.1A Adjustable Single Resistor Low Dropout Regulator.
TR5-F40W Block Diagram