The KSZ8851-16MLL-Eval Evaluation Board is intended to provide a convenient and fast way to evaluate or demonstrate the functionality and performance of this new Single-Port Ethernet Controller KSZ8851-16MLL device from Micrel. The KSZ8851-16MLL comes with a 48-pin, lead-free LQFP (7mm x 7mm) package and provides an ideal solution for applications requiring high-performance from single-port Ethernet Controller with 8-bit or 16-bit generic processor interface. The KSZ8851-16MLL offers the most costeffective solution for adding high-throughput Ethernet connectivity to traditional embedded systems. This evaluation board is designed as a stand alone without microcontroller or M16C on board. By default the KSZ8851-16MLL-Eval board comes with an operation of 16-bit bus mode, Little Endian mode and disabled EEPROM for KSZ8851-16MLL device. Customer may wire the board for his desired interface. The purpose is to provide a simple tool that can be used to evaluate the KSZ8851-16MLL device by connecting via headers to customer provided Microcontroller or Non- PCI hardware platform. Provided is a basic software driver based on the 8 or 16-bit bus solution and different operating system platforms to evaluate the KSZ8851-16MLL functionality and performance. The software includes a configuration utility to allow quick and easy device setup, initialization and transmit/receive packet. All KSZ8851-16MLL configuration pins and host interface signals are accessible either by jumpers, test points or headers.
• One KSZ8851-16MLL 48-pin Single-Port Ethernet Controller with shared data bus for host interface • Single +5V/GND power input from headers • RJ-45 Jack for Fast Ethernet cable interface • HP Auto-MDIX for automatic detection and correction for straight-through and crossover cables • Two on board LDO voltage regulators, one for VDD_IO and the other for VDD_A3.3 • One AT93C46 for external EEPROM interface • Two LED indicators for port status and activity • One LED indicator for 3.3V output ready • One LED indicator for Power Management Event (PME) output status • Jumpers to configure strapping pins and VDD_IO voltage option • Headers to wire the host interface from external hardware platform • Manual reset button for quick reboot after re-configuration of strapping pins| Documents | Last Updated | Size | |
|---|---|---|---|
| Test Procedure Rev 1.1 for the KSZ8851-16MLL EVAL BRD | 10/15/2015 2:34:43 PM | 508KB | |
| KSZ8851-16MLL Demo Board BOM | 10/15/2015 2:33:43 PM | 13KB | |
| KSZ8851-16MLL Eval Board User Guide | 10/15/2015 2:31:41 PM | 228KB | |
| KSZ8851-16MLL Demo Board Schematic | 10/15/2015 2:19:31 PM | 66KB | |
| Test Procedure for the KSZ8851SNL EVAL BRD rev1.1 | 10/15/2015 2:15:29 PM | 457KB | |
| KSZ8851 Eval Board Land pattern | 10/15/2015 2:14:44 PM | 26KB | |
| KSZ8851 Eval Board Schematics | 10/15/2015 2:13:58 PM | 56KB | |
| KSZ8851 Eval Board BOM | 10/15/2015 2:13:27 PM | 11KB | |
| KSZ8851 Eval Board Gerber | 10/15/2015 2:11:41 PM | 637KB | |
| KSZ8851 Eval Board User Guide | 10/15/2015 2:10:41 PM | 269KB |
