74AHC257D: Quad 2-input multiplexer; 3-state _ BDTIC a Leading Distributor in China

74AHC257D: Quad 2-input multiplexer; 3-state

The 74AHC257; 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74AHC257; 74AHCT257 is the logic implementation of a 4-pole 2-position switch, where the position of the switch is determined by the logic levels applied to input S. The outputs are forced to a high-impedance OFF-state when OE is HIGH.

The logic equations for the outputs are:

The 74AHC257; 74AHCT257 is identical to the 74AHC258; 74AHCT258, but has non-inverting (true) outputs.

74AHC257D: Product Block Diagram

sot109-1_3d

Data Sheets (1)

Name/Description	Modified Date
Quad 2-input multiplexer; 3-state (REV 2.0) PDF (92.0 kB) 74AHC_AHCT257 [English]	09 May 2008

Application Notes (5)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]	04 Nov 2011

Brochures (2)

Name/Description	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

Package Information (1)

Name/Description	Modified Date
plastic small outline package; 16 leads; body width 3.9 mm (REV 1.0) PDF (192.0 kB) SOT109-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
SO16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 4.0) PDF (210.0 kB) SOT109-1_118 [English]	24 Apr 2013

Supporting Information (2)

Name/Description	Modified Date
Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English]	08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English]	08 Oct 2009

IBIS Model

ahc257 IBIS model (REV 1.0) ibs AHC257 4/7/2013

Ordering Information

Product	Status	Family	V_CC (V)	Function	Logic switching levels	Description	Output drive capability (mA)	Package version	t_pd (ns)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74AHC257D	Active	AHC(T)	2.0 - 5.5	Digital multiplexers	CMOS	quad 2-input multiplexer (3-State)	+/- 8	SOT109-1	2.9	low	-40~125	94	10.3	53	SO16	16

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74AHC257D		SOT109-1	SO-SOJ-REFLOW SO-SOJ-WAVE SO-SOJ-REFLOW SO-SOJ-WAVE	Reel 13" Q1/T1	Active	74AHC257D,118 (9352 654 67118)	74AHC257D	74AHC257D		week 35, 2004	84.9	6.62	1.51E8	1	1
74AHC257D		SOT109-1	SO-SOJ-REFLOW SO-SOJ-WAVE SO-SOJ-REFLOW SO-SOJ-WAVE	Bulk Pack	Active	74AHC257D,112 (9352 654 67112)	74AHC257D	74AHC257D		week 35, 2004	84.9	6.62	1.51E8	1	1