74AHC273BQ: Octal D-type flip-flop with reset; positive-edge trigger
The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops simultaneously.
The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
All outputs will be forced LOW, independent of clock or data inputs, by a LOW on the MR input.
The device is useful for applications where only the true output is required and the clock and master reset are common to all storage elements.
74AHC273BQ: Product Block Diagram
Outline 3d SOT764-1
Data Sheets (1)
Application Notes (5)
Brochures (2)
Package Information (1)
Packing (1)
IBIS Model
Ordering Information
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74AHC273BQ | Active | AHC(T) | 2.0 - 5.5 | D-type flip-flops | CMOS | positive-edge trigger | +/- 8 | SOT764-1 | 4.2 | 165 | low | -40~125 | 78 | 9.1 | 50 | DHVQFN20 | 20 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74AHC273BQ | | SOT764-1 | | Reel 7" Q1/T1 | Active | 74AHC273BQ,115
(9352 730 49115) | AHC273 | 74AHC273BQ | | Always Pb-free | 84.9 | 6.62 | 1.51E8 | 1 | 1 |