74AHC30PW: 8-input NAND gate
The 74AHC30; 74AHCT30 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC30; 74AHCT30 provides an 8-input NAND function.
74AHC30PW: Product Block Diagram
Outline 3d SOT402-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 8-input NAND gate (REV 4.0) PDF (186.0 kB) 74AHC_AHCT30 [English] | 22 Jul 2015 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English] | 04 Nov 2011 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English] | 08 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
IBIS Model
- 74AHC30 IBIS model (REV 1.0) ibs AHC30 8/31/2015
Ordering Information
| Product | Status | Family | VCC (V) | Function | Type | Description | Logic switching levels | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC30PW | Active | AHC(T) | 2.0 - 5.5 | NAND gates | NAND gates | 8-input NAND gate | CMOS | SOT402-1 | +/- 8 | 3.6 | 60 | 1 | low | -40~125 | 143 | 8.5 | 69 | TSSOP14 | 14 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC30PW | | SOT402-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74AHC30PW,118 (9352 641 87118) | AHC30 | 74AHC30PW |    | week 10, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
| Bulk Pack | Active | 74AHC30PW,112 (9352 641 87112) | AHC30 | 74AHC30PW | | week 10, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
- 8-input NAND gate 74AHC30PW
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- 74AHC30 IBIS model 74AHC30PW
- plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
- 74AHC_T_30
- 74LV164
