74AHC74D: Dual D-type flip-flop with set and reset; positive-edge trigger
The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
74AHC74D: Product Block Diagram
sot108-1_3d
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Dual D-type flip-flop with set and reset; positive-edge trigger (REV 7.0) PDF (133.0 kB) 74AHC_AHCT74 [English] | 21 Apr 2015 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English] | 04 Nov 2011 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic small outline package; 14 leads; body width 3.9 mm (REV 1.0) PDF (166.0 kB) SOT108-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 4.0) PDF (207.0 kB) SOT108-1_118 [English] | 08 Apr 2013 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English] | 08 Oct 2009 |
IBIS Model
- ahc74 IBIS model (REV 1.0) ibs AHC74 4/7/2013
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC74D | Active | AHC(T) | 2.0 - 5.5 | D-type flip-flops | CMOS | positive-edge trigger | +/- 8 | SOT108-1 | 3.7 | 170 | low | -40~125 | 108 | 20.1 | 66 | SO14 | 14 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC74D | | SOT108-1 | SO-SOJ-REFLOW
SO-SOJ-WAVE SO-SOJ-REFLOW SO-SOJ-WAVE | Reel 13" Q1/T1 | Active | 74AHC74D,118 (9352 630 78118) | 74AHC74D | 74AHC74D |    | week 32, 2004 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
| Bulk Pack | Active | 74AHC74D,112 (9352 630 78112) | 74AHC74D | 74AHC74D | | week 32, 2004 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- ahc74 IBIS model 74AHC74PW
- plastic small outline package; 14 leads; body width 3.9 mm 74LV164_Q100
- Footprint for reflow soldering NPIC6C596A_Q100
- Footprint for wave soldering NPIC6C596A_Q100
- SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... 74LV164_Q100
- 74LVC2G74
- UBA2213
