The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
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Dual D-type flip-flop with set and reset; positive-edge trigger (REV 7.0) PDF (133.0 kB) 74AHC_AHCT74 [English] | 21 Apr 2015 |
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Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English] | 04 Nov 2011 |
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電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
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plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English] | 08 Feb 2016 |
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TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English] | 08 Apr 2013 |
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Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74AHC74PW | Active | AHC(T) | 2.0 - 5.5 | D-type flip-flops | CMOS | positive-edge trigger | +/- 8 | SOT402-1 | 3.7 | 170 | low | -40~125 | 141 | 7.8 | 68 | TSSOP14 | 14 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74AHC74PW | SOT402-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74AHC74PW,118 (9352 630 79118) | AHC74 | 74AHC74PW | week 10, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 | ||
Bulk Pack | Active | 74AHC74PW,112 (9352 630 79112) | AHC74 | 74AHC74PW | week 10, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |