74AHCT2G126DC: Dual buffer/line driver; 3-state

The 74AHC2G126 and 74AHCT2G126 are high-speed Si-gate CMOS devices. They provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A LOW at nOE causes the output to assume a high-impedance OFF-state.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

74AHCT2G126DC: Product Block Diagram
74AHCT2G126DC: Block Diagram
74AHCT2G126DC: Block Diagram
Outline 3d SOT765-1
Data Sheets (1)
Name/DescriptionModified Date
Dual buffer/line driver; 3-state (REV 7.0) PDF (187.0 kB) 74AHC_AHCT2G126 [English]06 May 2013
Application Notes (6)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]04 Nov 2011
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic very thin shrink small outline package; 8 leads; body width 2.3 mm (REV 1.1) PDF (245.0 kB) SOT765-1 [English]05 Jul 2016
Packing (1)
Name/DescriptionModified Date
VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... (REV 5.0) PDF (210.0 kB) SOT765-1_125 [English]03 May 2013
Ordering Information
ProductStatusFamilyVCC (V)FunctionDescriptionLogic switching levelsOutput drive capability (mA)Package versionfmax (MHz)No of bitstpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AHCT2G126DCActiveAHC(T)4.5 - 5.5Buffers/inverters/driversTTL enabled (3-state)TTL+/- 8SOT765-16023.4low-40~12520636.1116VSSOP88
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74AHCT2G126DCSOT765-1Reel 7" Q3/T4, ReverseActive74AHCT2G126DC,125 (9352 751 35125)C2674AHCT2G126DCweek 1, 200584.96.621.51E811
Dual buffer/line driver; 3-state 74AHCT2G126GD
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
PicoGate Logic footprints NX3L4684
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
plastic very thin shrink small outline package; 8 leads; body width 2.3 mm 74LVC3G17_Q100
VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... 74LVC3G17_Q100
74AVCM162836DGG
74VHC_T_126
XC7WT14