74ALVC164245: 16-bit dual supply translating transceiver; 3-state (Based on PIP 74ALVC164245)

The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment.

This device can be used as two 8-bit transceivers or one 16-bit transceiver.

The direction control inputs (1DIR and 2DIR) determine the direction of the data flow. nDIR (active HIGH) enables data from nAn ports to nBn ports. nDIR (active LOW) enables data from nBn ports to nAn ports. The output enable inputs (1OE and 2OE), when HIGH, disable both nAn and nBn ports by placing them in a high-impedance OFF-state. Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B).

In suspend mode, when one of the supply voltages is zero, there will be no current flow from the non-zero supply towards the zero supply. The nAn-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(B) ≥ VCC(A) (except in suspend mode).

74ALVC164245: Product Block Diagram
sot1134-2_3d
Data Sheets (1)
Name/DescriptionModified Date
16-bit dual supply translating transceiver; 3-state (REV 8.0) PDF (277.0 kB) 74ALVC164245 [English]15 Mar 2012
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (4)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Application guide: Flat-panel TV sets (REV 2.1) PDF (3.2 MB) 75017085 [English]13 Mar 2012
Application guide; Portable devices and mobile handsets (REV 2.0) PDF (15.4 MB) 75017090 [English]13 Mar 2012
Package Information (3)
Name/DescriptionModified Date
plastic compatible thermal enhanced extremely thin quad flat package; no leads (REV 1.1) PDF (217.0 kB) SOT1134-2 [English]10 Jun 2016
plastic thin shrink small outline package; 48 leads; body width 6.1 mm (REV 1.0) PDF (467.0 kB) SOT362-1 [English]08 Feb 2016
plastic shrink small outline package; 48 leads; body width 7.5 mm (REV 1.0) PDF (482.0 kB) SOT370-1 [English]08 Feb 2016
Packing (2)
Name/DescriptionModified Date
Standard product orientation 12NC ending 118 (REV 2.0) PDF (87.0 kB) SOT370-1_118 [English]19 Apr 2013
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 5.0) PDF (242.0 kB) SOT362-1_118 [English]15 Apr 2013
Supporting Information (2)
Name/DescriptionModified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS Model
Ordering Information
ProductStatusFamilyDescriptionVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)No of pinsPackage namePackage version
74ALVC164245DGGActiveALVC16-bit dual-supply voltage level translating transceiver (3-state)1.5 - 5.51.5 - 3.6CMOS/LVTTL+/- 242.916low-40~85822.03748TSSOP48SOT362-1
74ALVC164245DLActiveALVC16-bit dual-supply voltage level translating transceiver (3-state)1.5 - 5.51.5 - 3.6CMOS/LVTTL+/- 242.916low-40~858825.048SSOP48SOT370-1
74ALVC164245BXActiveALVC16-bit dual-supply voltage level translating transceiver (3-state)1.5 - 5.51.5 - 3.6CMOS/LVTTL+/- 242.916low-40~8560HXQFN60USOT1134-2
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74ALVC164245BXSOT1134-2Reel 13" Q1/T1 in DrypackActive74ALVC164245BX,518 (9352 958 65518)ALVC16424574ALVC164245BXAlways Pb-free123.83.872.58E822
74ALVC164245DLSOT370-1SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1Active74ALVC164245DL,118 (9352 023 40118)ALVC16424574ALVC164245DLweek 13, 2005123.83.872.58E811
Bulk PackActive74ALVC164245DL,112 (9352 023 40112)ALVC16424574ALVC164245DLweek 13, 2005123.83.872.58E811
74ALVC164245DGGSOT362-1SSOP-TSSOP-VSO-WAVEBulk PackActive74ALVC164245DGG,11 (9352 023 50112)ALVC16424574ALVC164245DGGAlways Pb-free123.83.872.58E811
Reel 13" Q1/T1Active74ALVC164245DGG:11 (9352 023 50118)ALVC16424574ALVC164245DGGAlways Pb-free123.83.872.58E811
Tube in DrypackWithdrawn74ALVC164245DGG,51 (9352 023 50512)ALVC16424574ALVC164245DGGweek 14, 2005123.83.872.58E822
Reel 13" Q1/T1 in DrypackWithdrawn74ALVC164245DGG:51 (9352 023 50518)ALVC16424574ALVC164245DGGweek 14, 2005123.83.872.58E822
16-bit dual supply translating transceiver; 3-state 74ALVC164245DL
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
Application guide: Flat-panel TV sets mmbz33vcl
Application guide; Portable devices and mobile handsets pesd24vs1ul
alvc164245 IBIS model 74ALVC164245DL
SOT1134-2 74LVC16374ABX
plastic shrink small outline package; 48 leads; body width 7.5 mm gtl2000dl
Footprint for reflow soldering 74HC_T_595_Q100
Standard product orientation 12NC ending 118 gtl2000dl
plastic thin shrink small outline package; 48 leads; body width 6.1 mm 74LVC_H_16245A_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC_H_16245A_Q100
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74LVT162245B
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