The 74ALVC574 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input (CP) and an outputs enable input (OE) are common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW to HIGH CP transition.
When pin OE is LOW, the contents of the eight flip-flops is available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
The 74ALVC574 is functionally identical to the 74ALVC374, but has a different pin arrangement.
Name/Description | Modified Date |
---|---|
Octal D-type flip-flop; positive edge trigger; 3-state (REV 2.0) PDF (100.0 kB) 74ALVC574 [English] | 08 Nov 2007 |
Name/Description | Modified Date |
---|---|
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Name/Description | Modified Date |
---|---|
Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English] | 10 Jul 2015 |
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Name/Description | Modified Date |
---|---|
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Name/Description | Modified Date |
---|---|
plastic small outline package; 20 leads; body width 7.5 mm (REV 1.0) PDF (335.0 kB) SOT163-1 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
---|---|
SO20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 2.0) PDF (246.0 kB) SOT163-1_118 [English] | 15 Apr 2013 |
Name/Description | Modified Date |
---|---|
Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
Wave Soldering Profile (REV 1.0) PDF (20.0 kB) WAVE_SOLDERING_PROFILE [English] | 30 Sep 2013 |
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74ALVC574D | Active | ALVC | 1.65 - 3.6 | D-type flip-flops | TTL | positive-edge trigger (3-state) | SOT163-1 | +/- 24 | 2.5 | 300 | low | -40~85 | 84 | 26.7 | 60 | SO20 | 20 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74ALVC574D | SOT163-1 | Reflow_Soldering_Profile
Wave_Soldering_Profile Reflow_Soldering_Profile Wave_Soldering_Profile | Reel 13" Q1/T1 | Active | 74ALVC574D,118 (9352 697 38118) | 74ALVC574D | 74ALVC574D | week 30, 2004 | 123.8 | 3.87 | 2.58E8 | 1 | 1 | ||
Bulk Pack | Active | 74ALVC574D,112 (9352 697 38112) | 74ALVC574D | 74ALVC574D | week 30, 2004 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |