74ALVC74D: Dual D-type flip-flop with set and reset; positive-edge trigger

The 74ALVC74 is a dual positive-edge triggered, D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and complementary Q and Q outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

74ALVC74D: Product Block Diagram
sot108-1_3d
Data Sheets (1)
Name/DescriptionModified Date
Dual D-type flip-flop with set and reset; positive-edge trigger (REV 3.0) PDF (103.0 kB) 74ALVC74 [English]26 May 2003
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
Brochures (3)
Name/DescriptionModified Date
Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English]10 Jul 2015
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic small outline package; 14 leads; body width 3.9 mm (REV 1.0) PDF (166.0 kB) SOT108-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 4.0) PDF (207.0 kB) SOT108-1_118 [English]08 Apr 2013
Supporting Information (2)
Name/DescriptionModified Date
Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English]08 Oct 2009
IBIS Model
Ordering Information
ProductStatusFamilyFunctionVCC (V)Logic switching levelsDescriptionOutput drive capability (mA)Package versiontpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74ALVC74DActiveALVCD-type flip-flops1.65 - 3.6TTLpositive-edge trigger+/- 24SOT108-12.3425low-40~8510317.162SO1414
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74ALVC74DSOT108-1SO-SOJ-REFLOW SO-SOJ-WAVE
SO-SOJ-REFLOW SO-SOJ-WAVE
Reel 13" Q1/T1Active74ALVC74D,118 (9352 697 41118)74ALVC74D74ALVC74DAlways Pb-free123.83.872.58E811
Bulk PackActive74ALVC74D,112 (9352 697 41112)74ALVC74D74ALVC74DAlways Pb-free123.83.872.58E811
Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
Low voltage CMOS family - LVC 74LVC_H_245A_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
alvc74 IBIS model 74ALVC74PW
plastic small outline package; 14 leads; body width 3.9 mm 74LV164_Q100
Footprint for reflow soldering NPIC6C596A_Q100
Footprint for wave soldering NPIC6C596A_Q100
SO14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... 74LV164_Q100
74LVC74A
UBA2213