The 74ALVCH162827 high-performance CMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NAND Output Enables (nOE1, nOE2) for maximum control flexibility.
The 74ALVCH162827 is designed with 30Ω series resistance in both the pull-up and pull-down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Name/Description | Modified Date |
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20-bit buffer/line driver, non-inverting, with 30 Ohm termination resistors (3-state) (REV 1.0) PDF (72.0 kB) 74ALVCH162827 [English] | 14 Mar 2014 |
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Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
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Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English] | 10 Jul 2015 |
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
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ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
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plastic thin shrink small outline package; 56 leads; body width 6.1 mm (REV 1.0) PDF (506.0 kB) SOT364-1 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
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TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (248.0 kB) SOT364-1_118 [English] | 15 Apr 2013 |
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Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Package version | Output drive capability (mA) | fmax (MHz) | No of bits | tpd (ns) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74ALVCH162827DGG | Active | ALVC | 2.3 - 3.6 | Buffers/inverters/drivers | LVTTL | 20-bit buffer/line driver with bus hold and 30 Ohm termination resistors (3-state) | SOT364-1 | +/- 12 | 150 | 20 | 2.9 | low | -40~85 | 93 | 21.0 | TSSOP56 | 56 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
74ALVCH162827DGG | SOT364-1 | SSOP-TSSOP-VSO-WAVE | Tube in Drypack | Active | 74ALVCH162827DGGS (9352 543 70512) | ALVCH162827 | 74ALVCH162827DGG | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | ||
Reel 13" Q1/T1 in Drypack | Active | 74ALVCH162827DGGY (9352 543 70518) | ALVCH162827 | 74ALVCH162827DGG | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 | |||||
Bulk Pack | Discontinued | 74ALVCH162827DGG:1 (9352 543 70112) | ALVCH162827 | 74ALVCH162827DGG | week 2, 2006 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |