74ALVCH16543DGG: 16-bit D-type registered transceiver; 3-state
The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction.
Separate latch enable (nLE AB, nLE BA) and output enable (nOE AB, nOE BA) inputs are provided for each register to permit independent control in either direction of the data flow.
The ?16543? contains two sections each consisting of two sets of eight D-type latches with separate inputs and controls for each set. For data flow from A to B, for example, the A-to-B enable (nE AB, where n equals 1 or 2) inputs must be LOW in order to enter data from nA0 to nA7, or take data from nB0 to nB7, as indicated in the function table. With nE AB LOW, a LOW signal on the A-to-B latch enable (nLE AB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the nLE AB signal stores the A data into the latches. With nE AB and nOE AB both LOW, the 3-state B output buffers are active and display the data present at the output of the A latches. Similarly, the nEBA, nLE BA and nOE BA signals control the data flow from B-to-A.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
74ALVCH16543DGG: Product Block Diagram
Outline 3d SOT364-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 16-bit D-type registered transceiver; 3-state (REV 2.0) PDF (98.0 kB) 74ALVCH16543 [English] | 23 Nov 1999 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Brochures (3)
| Name/Description | Modified Date |
|---|---|
| Low voltage CMOS family - LVC (REV 1.0) PDF (2.6 MB) 75017668 [English] | 10 Jul 2015 |
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 56 leads; body width 6.1 mm (REV 1.0) PDF (506.0 kB) SOT364-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (248.0 kB) SOT364-1_118 [English] | 15 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
IBIS Model
- alvch16543 IBIS model (REV 1.0) ibs ALVCH16543 4/7/2013
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability | Package version | tpd (ns) | No of bits | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ALVCH16543DGG | Active | ALVC | 1.65 - 3.6 | Transceivers | TTL | 16-bit registered transceiver with bus hold (3-state) | +/- 24 | SOT364-1 | 3.8 | 16 | 150 | low | 93 | 21.0 | TSSOP56 | 56 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ALVCH16543DGG | | SOT364-1 | SSOP-TSSOP-VSO-WAVE | Tube in Drypack | Active | 74ALVCH16543DGGS (9352 625 44512) | ALVCH16543 | 74ALVCH16543DGG |    | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
| Reel 13" Q1/T1 in Drypack | Active | 74ALVCH16543DGGY (9352 625 44518) | ALVCH16543 | 74ALVCH16543DGG | | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
- 16-bit D-type registered transceiver; 3-state 74ALVCH16543DGG
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
- Low voltage CMOS family - LVC 74LVC_H_245A_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- ロジック製品セレクションガイド... 74LVC_H_245A_Q100
- Logic selection guide 2016 74LVC_H_245A_Q100
- TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... pcf8576d_automotive
- plastic thin shrink small outline package; 56 leads; body width 6.1 mm pcf8576d_automotive
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- 74ALVCH16543DGG
- 74LVT16652A
