74ALVCH16825DGG: 18-bit buffer/driver (3-State) _ BDTIC a Leading Distributor in China

74ALVCH16825DGG: 18-bit buffer/driver (3-State)

The 74ALVCH16825 is an 18-bit non-inverting buffer/driver with 3-State outputs for bus-oriented applications.

The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be LOW for corresponding D outputs to be active. If either output enable input is HIGH, the outputs of that 9-buffer section are in the high impedance state.

The 74ALVCH16825 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

74ALVCH16825DGG: Product Block Diagram

Outline 3d SOT364-1

Data Sheets (1)

Name/Description	Modified Date
18-bit buffer/driver (3-state) (REV 2.0) PDF (73.0 kB) 74ALVCH16825 [English]	14 Mar 2014

Application Notes (5)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]	15 Sep 1995

Brochures (2)

Name/Description	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic thin shrink small outline package; 56 leads; body width 6.1 mm (REV 1.0) PDF (506.0 kB) SOT364-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (248.0 kB) SOT364-1_118 [English]	15 Apr 2013

Supporting Information (1)

Name/Description	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

alvch16825 IBIS model (REV 1.0) ibs ALVCH16825 4/7/2013

Ordering Information

Product	Status	Family	Function	V_CC (V)	Logic switching levels	Description	Package version	Output drive capability (mA)	f_max (MHz)	No of bits	Power dissipation considerations	t_pd (ns)	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74ALVCH16825DGG	Active	ALVC	Buffers/inverters/drivers	2.3 - 3.6	LVTTL	18-bit buffer/line driver with bus hold (3-state)	SOT364-1	+/- 24	150	18	low	2	-40~85	93	21.0		TSSOP56	56

Package Information

Product ID	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74ALVCH16825DGG	SOT364-1	SSOP-TSSOP-VSO-WAVE	Tube in Drypack	Active	74ALVCH16825DGGS (9352 590 50512)	ALVCH16825	74ALVCH16825DGG	Always Pb-free	123.8	3.87	2.58E8	1	1
			Reel 13" Q1/T1 in Drypack	Active	74ALVCH16825DGGY (9352 590 50518)	ALVCH16825	74ALVCH16825DGG	Always Pb-free	123.8	3.87	2.58E8	1	1
			Bulk Pack	Discontinued	74ALVCH16825DGG,11 (9352 590 50112)	ALVCH16825	74ALVCH16825DGG	week 2, 2006	123.8	3.87	2.58E8	1	1
			Reel 13" Q1/T1	Withdrawn	74ALVCH16825DGG:11 (9352 590 50118)	ALVCH16825	74ALVCH16825DGG	week 2, 2006	123.8	3.87	2.58E8	1	1