74ALVT162821DL: 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30 Ohm termination resistors (3-State)

The 74ALVT162821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V.

The 74ALVT162821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates.

Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.

The active Low Output Enable (nOE) controls all ten 3-State buffers independent of the register operation. When nOE is Low, the data in the register appears at the outputs. When nOE is Highthe outputs are in high impedance "off" state, which means they will neither drive nor load the bus.

The 74ALVT162821 is designed with 30 Ω series resistance in both High and Low output stages. This design reduces the line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters. The series termination resistors reduce overshoot and undershoot and are ideal for driving memory arrays.

74ALVT162821DL: Product Block Diagram

Outline 3d SOT371-1

Data Sheets (1)

Name/Description	Modified Date
2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30 Ohm termination resistors (3-state) (REV 3.0) PDF (97.0 kB) 74ALVT162821 [English]	14 Mar 2014

Application Notes (8)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]	02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]	01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]	01 Jan 1998
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]	15 Sep 1995

Brochures (2)

Name/Description	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic shrink small outline package; 56 leads; body width 7.5 mm (REV 1.0) PDF (530.0 kB) SOT371-1 [English]	08 Feb 2016

Supporting Information (2)

Name/Description	Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]	08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

alvt162821 IBIS model (REV 1.0) ibs ALVT162821 4/7/2013

SPICE model

alvt16 Spice model (REV 1.0) ZIP ALVT16 5/7/2013

Ordering Information

Product	Status	Family	V_CC (V)	Function	Description	Logic switching levels	Output drive capability (mA)	Package version	t_pd (ns)	f_max (MHz)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74ALVT162821DL	Active	ALVT	2.3 - 3.6	D-type flip-flops	positive-edge trigger (3-state)	TTL	+/- 12	SOT371-1	3.2	150	medium	-40~85	84	24.0		SSOP56	56

Package Information

Product ID	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74ALVT162821DL	SOT371-1	SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE	Tube in Drypack	Active	74ALVT162821DL,512 (9352 554 50512)	ALVT162821	74ALVT162821DL	week 13, 2005	70.8	1.33	7.52E8	1	2
			Reel 13" Q1/T1 in Drypack	Active	74ALVT162821DL,518 (9352 554 50518)	ALVT162821	74ALVT162821DL	week 13, 2005	70.8	1.33	7.52E8	1	2
			Reel 13" Q1/T1	Withdrawn	74ALVT162821DL,118 (9352 554 50118)	ALVT162821	74ALVT162821DL		70.8	1.33	7.52E8	1	NA