74AUP1G06GX: Low-power inverter with open-drain output

The 74AUP1G06 provides the single inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

74AUP1G06GX: Product Block Diagram
sot1226_3d
Data Sheets (1)
Name/DescriptionModified Date
Low-power inverter with open-drain output (REV 7.0) PDF (338.0 kB) 74AUP1G06 [English]28 Jun 2012
Application Notes (1)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Brochures (3)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English]13 Oct 2014
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals (REV 1.0) PDF (199.0 kB) SOT1226 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
X2SON5; Reel pack SMD 7" Q3/T4 standard product orientation Orderable part number ending ,125 or H Ordering... (REV 1.0) PDF (97.0 kB) SOT1226_125 [English]09 Aug 2016
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT1226 Topmark (REV 1.0) PDF (35.0 kB) MAR_SOT1226 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyFunctionVCC (V)DescriptionLogic switching levelsOutput drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AUP1G06GXActiveAUPBuffers/inverters/drivers1.1 - 3.6open-drainCMOS1.9SOT1226701ultra low4.5-40~12532290.7191X2SON55
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AUP1G06GXSOT1226Reel 7" Q3/T4, ReverseActive74AUP1G06GX,125 (9352 983 56125)pR74AUP1G06GXAlways Pb-free11
Low-power inverter with open-drain output 74AUP1G06GW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
X2SON5; Reel pack SMD 7" Q3/T4 standard product orientation Orderable part number ending ,125 or H Ordering... 74AUP1G32
MAR_SOT1226 Topmark 74AUP1G32
74AUP1G06 IBIS model 74AUP1G06GW
SOT1226 74AUP1G32
74AVCM162836DGG
74LVC1G17