74AUP2G32DC: Low-power dual 2-input OR gate
The 74AUP2G32 provides dual 2-input OR function.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
74AUP2G32DC: Product Block Diagram
Outline 3d SOT765-1
Data Sheets (1)
Application Notes (3)
Brochures (3)
Selector Guides (2)
Package Information (1)
Packing (1)
IBIS Model
Ordering Information
Product | Status | Family | Function | VCC (V) | Logic switching levels | Type | Description | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74AUP2G32DC | Active | AUP | OR gates | 1.1 - 3.6 | CMOS | OR gates | dual 2-input OR gate | SOT765-1 | +/- 1.9 | 7.9 | 70 | 2 | ultra low | -40~125 | 203 | 34.1 | 113 | VSSOP8 | 8 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74AUP2G32DC | | SOT765-1 | | Reel 7" Q3/T4, Reverse | Active | 74AUP2G32DC,125
(9352 807 13125) | p32 | 74AUP2G32DC | | Always Pb-free | 0.0 | 3.29 | 3.04E8 | 1 | 1 |