74AUP2G3404GF: Low-power buffer and inverter
The 74AUP2G3404 is a single buffer and single inverter.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
74AUP2G3404GF: Product Block Diagram
Outline 3d SOT891
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Low-power buffer and inverter (REV 1.0) PDF (324.0 kB) 74AUP2G3404 [English] | 22 Aug 2012 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Brochures (3)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English] | 13 Oct 2014 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm (REV 1.0) PDF (185.0 kB) SOT891 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| XSON6; reel pack; standard product orientation; 12NC ending 132 (REV 1.0) PDF (180.0 kB) SOT891_132 [English] | 26 Aug 2014 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
| MAR_SOT891 Topmark (REV 1.0) PDF (51.0 kB) MAR_SOT891 [English] | 03 Jun 2013 |
IBIS Model
- aup2g34 IBIS model (REV 1.0) ibs AUP2G34 9/7/2015
- IBIS model (REV 1.0) ibs AUP2G3404 6/4/2014
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Type | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G3404GF | Active | AUP | 1.1 - 3.6 | Combination | CMOS | buffer and inverter | Combination gates | SOT891 | +/- 1.9 | 4 | 70 | 2 | ultra low | -40~125 | 290 | 6.5 | 145 | XSON6 | 6 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G3404GF | | SOT891 | Reflow_Soldering_Profile | Reel 7" Q3/T4, Reverse | Active | 74AUP2G3404GF,125 (9352 977 95125) | aZ | 74AUP2G3404GF |    | Always Pb-free | 1 | 1 |
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