74AUP2G3407GM: Low-power single buffer; single buffer with open-drain
The 74AUP2G3407 is a single buffer and a single buffer with open-drain output. It features two input pins (nA), an output pin (1Y) and an open-drain output pin (2Y).
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Outline 3d SOT886
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Low-power single buffer; single buffer with open-drain (REV 1.0) PDF (221.0 kB) 74AUP2G3407 [English] | 18 Oct 2013 |
Brochures (3)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English] | 13 Oct 2014 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm (REV 1.0) PDF (189.0 kB) SOT886 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
| MAR_SOT886 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT886 [English] | 03 Jun 2013 |
IBIS Model
- aup2g3407 IBIS model (REV 1.0) ibs AUP2G3407 12/22/2014
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Type | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G3407GM | Active | AUP | 1.1 - 3.6 | Combination | CMOS | buffer and buffer with open-drain | Combination gates | +/- 1.9 | SOT886 | 4.1 | 70 | 2 | ultra low | -40~125 | 290 | 6.5 | 145 | XSON6 | 6 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G3407GM | | SOT886 | Reflow_Soldering_Profile | Reel 7" Q3/T4, Reverse | Active | 74AUP2G3407GMH (9353 024 21125) | Standard Marking | 74AUP2G3407GM |    | Always Pb-free | 1 | 1 |
- Low-power single buffer; single buffer with open-drain 74AUP2G3407GW
- 電圧レベルシフタ 74AVC16245DGG-Q100
- NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- MAR_SOT886 Topmark prtr5v0u2f
- aup2g3407 IBIS model 74AUP2G3407GW
- XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm prtr5v0u2f
- Reflow_Soldering_Profile Wave_Soldering_Profile LPC1112FD20
- BGU8007
