74AUP2G97DP: Low-power dual PCB configurable multiple function gate
The 74AUP2G97 is a dual configurable multiple function gate with Schmitt-trigger inputs.
Each gate within the device can be configured as any of the following logic functions
MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be
connected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF
circuitry disables the output, preventing the potentially damaging backflow current through
the device when it is powered down.
sot552-1_3d
Data Sheets (1)
Package Information (1)
Packing (1)
Supporting Information (3)
IBIS Model
Ordering Information
Product | Status | Family | VCC (V) | Description | Type | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins | Package version |
---|
74AUP2G97DP | Active | AUP | 1.1 - 3.6 | Schmitt trigger | Configurable gates | CMOS | +/- 1.9 | 8.7 | 70 | 2 | ultra low | -40~125 | 120 | 30.0 | | TSSOP10 | 10 | SOT552-1 |
Package Information