74AUP3G34GS: Low-power triple buffer
The 74AUP3G34 is a triple buffer.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
times.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
74AUP3G34GS: Product Block Diagram
sot1203_3d
Data Sheets (1)
Brochures (1)
Selector Guides (2)
Package Information (1)
Packing (1)
Supporting Information (1)
Name/Description | Modified Date |
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MAR_SOT1203 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT1203 [English] | 03 Jun 2013 |
IBIS Model
Ordering Information
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | fmax (MHz) | No of bits | Power dissipation considerations | tpd (ns) | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
---|
74AUP3G34GS | Active | AUP | 1.1 - 3.6 | triple buffer | CMOS | triple buffer | +/- 1.9 | SOT1203 | 70 | 3 | ultra low | 3.9 | -40~125 | 276 | 10.8 | 146 | XSON8 | 8 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | MSL | MSL LF |
---|
74AUP3G34GS | | SOT1203 | | Reel 7" Q1/T1 | Active | 74AUP3G34GSX
(9353 051 61115) | Standard Marking | 74AUP3G34GS | | Always Pb-free | 1 | 1 |