74AVC2T45DP: Dual-bit, dual-supply voltage level translator/transceiver; 3-state

The 74AVC2T45 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

74AVC2T45DP: Product Block Diagram
Outline 3d SOT505-2
Data Sheets (1)
Name/DescriptionModified Date
Dual-bit, dual-supply voltage level translator/transceiver; 3-state (REV 7.0) PDF (243.0 kB) 74AVC2T45 [English]08 Feb 2013
Application Notes (3)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
Application guide: Flat-panel TV sets (REV 2.1) PDF (3.2 MB) 75017085 [English]13 Mar 2012
Application guide; Portable devices and mobile handsets (REV 2.0) PDF (15.4 MB) 75017090 [English]13 Mar 2012
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm (REV 1.2) PDF (239.0 kB) SOT505-2 [English]08 Jun 2016
Packing (1)
Name/DescriptionModified Date
TSSOP8: Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... (REV 5.0) PDF (210.0 kB) SOT505-2_125 [English]02 May 2013
IBIS Model
Ordering Information
ProductStatusFamilyVCC(A) (V)FunctionDescriptionVCC(B) (V)Logic switching levelsPackage versionOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AVC2T45DPActiveAVC(M)0.8 - 3.6Level shifters/translatorsdual-bit dual-supply voltage level translating transceiver (3-state)0.8 - 3.6CMOS/LVTTLSOT505-2+/- 122.12very low-40~12521720.6106TSSOP88
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AVC2T45DPSOT505-2Reel 7" Q3/T4, ReverseActive74AVC2T45DP,125 (9352 867 74125)B4574AVC2T45DPAlways Pb-free11
Dual-bit, dual-supply voltage level translator/transceiver; 3-state 74AVC2T45GT
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
PicoGate Logic footprints NX3L4684
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
Application guide: Flat-panel TV sets mmbz33vcl
Application guide; Portable devices and mobile handsets pesd24vs1ul
74AVC2T45 IBIS model 74AVC2T45GT
plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm 74LVC3G17_Q100
TSSOP8: Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... 74LVC3G17_Q100
74LVC_H_2T45
XC7WT14