74AVCH8T245: 8-bit dual supply translating transceiver with configurable voltage translation; 3-state (Based on PIP 74AVCH8T245)

The 74AVCH8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active.

The 74AVCH8T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

Outline 3d SOT815-1
Data Sheets (1)
Name/DescriptionModified Date
8-bit dual supply translating transceiver with configurable voltage translation; 3-state (REV 5.0) PDF (163.0 kB) 74AVCH8T245 [English]27 Dec 2012
Application Notes (2)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
Application guide: Flat-panel TV sets (REV 2.1) PDF (3.2 MB) 75017085 [English]13 Mar 2012
Application guide; Portable devices and mobile handsets (REV 2.0) PDF (15.4 MB) 75017090 [English]13 Mar 2012
Package Information (2)
Name/DescriptionModified Date
plastic thin shrink small outline package; 24 leads; body width 4.4 mm (REV 1.0) PDF (353.0 kB) SOT355-1 [English]08 Feb 2016
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x... (REV 1.0) PDF (195.0 kB) SOT815-1 [English]08 Feb 2016
Packing (2)
Name/DescriptionModified Date
DHVQFN24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.0) PDF (205.0 kB) SOT815-1_118 [English]19 Apr 2013
TSSOP24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 4.1) PDF (227.0 kB) SOT355-1_118 [English]15 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
Ordering Information
ProductStatusFamilyDescriptionVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)No of pinsPackage namePackage version
74AVCH8T245BQActiveAVC(M)8-bit dual-supply voltage translating transceiver with bus hold (3-state)0.8 - 3.60.8 - 3.6CMOS/LVTTL+/- 122.18very low-40~125676.24124DHVQFN24SOT815-1
74AVCH8T245PWActiveAVC(M)8-bit dual-supply voltage translating transceiver with bus hold (3-state)0.8 - 3.60.8 - 3.6CMOS/LVTTL+/- 122.18very low-40~125812.33624TSSOP24SOT355-1
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AVCH8T245BQSOT815-1Reel 13" Q1/T1Active74AVCH8T245BQ,118 (9352 845 92118)VCH8T24574AVCH8T245BQAlways Pb-free11
74AVCH8T245PWSOT355-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1Active74AVCH8T245PW:118 (9352 845 94118)AVCH8T24574AVCH8T245PWAlways Pb-free11
Bulk PackActive74AVCH8T245PW,112 (9352 845 94112)AVCH8T24574AVCH8T245PWAlways Pb-free11
8-bit dual supply translating transceiver with configurable voltage translation; 3-state 74AVCH8T245PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
Application guide: Flat-panel TV sets mmbz33vcl
Application guide; Portable devices and mobile handsets pesd24vs1ul
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x... 74LVC4245A_Q100
DHVQFN24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC4245A_Q100
plastic thin shrink small outline package; 24 leads; body width 4.4 mm 74LVC4245A_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP24; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC4245A_Q100
74LVC4245A
SA639DH