74HC40105PW: 4-bit x 16-word FIFO register _ BDTIC a Leading Distributor in China

74HC40105PW: 4-bit x 16-word FIFO register

The 74HC40105; 74HCT40105 is a first-in/first-out (FIFO) "elastic" storage register that can store 16 4‑bit words. It can handle input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems. Each word position in the register is clocked by a control flip‑flop, which stores a marker bit. A logic 1 signifies that the data at that position is filled and a logic 0 denotes a vacancy in that position. The control flip-flop detects the state of the preceding flip-flop and communicates its own status to the succeeding flip‑flop. When a control flip‑flop is in the logic 0 state and sees a logic 1 in the preceding flip-flop, it generates a clock pulse. The clock pulse transfers data from the preceding four data latches into its own four data latches and resets the preceding flip‑flop to logic 0. The first and last control flip-flops have buffered outputs. All empty locations "bubble" automatically to the input end, and all valid data ripples through to the output end. As a result, the status of the first control flip-flop (data‑in ready output - DIR) indicates if the FIFO is full. The status of the last flip‑flop (data‑out ready output - DOR) indicates whether the FIFO contains data. As the earliest data is removed from the bottom of the data stack (output end), all data entered later will automatically ripple toward the output. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Outline 3d SOT403-1

Data Sheets (1)

Name/Description	Modified Date
4-bit x 16-word FIFO register (REV 4.0) PDF (314.0 kB) 74HC_HCT40105 [English]	29 Jan 2016

Application Notes (2)

Name/Description	Modified Date
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA 74HC/74HCT family (REV 1.0) PDF (51.0 kB) AN11044 [English]	16 Mar 2011

Users Guides (1)

Name/Description	Modified Date
HC/T User Guide (REV 1.0) PDF (508.0 kB) HCT_USER_GUIDE [English]	01 Nov 1997

Package Information (1)

Name/Description	Modified Date
plastic thin shrink small outline package; 16 leads; body width 4.4 mm (REV 1.0) PDF (300.0 kB) SOT403-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (218.0 kB) SOT403-1_118 [English]	08 Apr 2013

Supporting Information (1)

Name/Description	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

Ordering Information

Product	Status	Family	V_CC (V)	Function	Logic switching levels	Description	Package version	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74HC40105PW	Active	HC(T)	2.0 - 6.0	FIFO registers	CMOS	4-bit x 16-word FIFO register	SOT403-1	+/- 5.2	15	30	low	-40~125	102	1.0	28	TSSOP16	16

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74HC40105PW		SOT403-1	SSOP-TSSOP-VSO-WAVE	Reel 13" Q1/T1	Active	74HC40105PW,118 (9351 890 70118)	HC40105	74HC40105PW		week 10, 2005	84.9	6.62	1.51E8	1	1
74HC40105PW		SOT403-1	SSOP-TSSOP-VSO-WAVE	Bulk Pack	Active	74HC40105PW,112 (9351 890 70112)	HC40105	74HC40105PW		week 10, 2005	84.9	6.62	1.51E8	1	1