74HC73DB: Dual JK flip-flop with reset; negative-edge trigger
The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
74HC73DB: Product Block Diagram
Outline 3d SOT337-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Dual JK flip-flop with reset; negative-edge trigger (REV 5.0) PDF (174.0 kB) 74HC73 [English] | 02 Dec 2015 |
Application Notes (2)
| Name/Description | Modified Date |
|---|---|
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Pin FMEA 74HC/74HCT family (REV 1.0) PDF (51.0 kB) AN11044 [English] | 16 Mar 2011 |
Users Guides (1)
| Name/Description | Modified Date |
|---|---|
| HC/T User Guide (REV 1.0) PDF (508.0 kB) HCT_USER_GUIDE [English] | 01 Nov 1997 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic shrink small outline package; 14 leads; body width 5.3 mm (REV 1.0) PDF (295.0 kB) SOT337-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| Standard product orientation 12NC ending 118 (REV 1.0) PDF (86.0 kB) SOT337-1_118 [English] | 04 Apr 2013 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | Function | VCC (V) | Logic switching levels | Description | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC73DB | Active | HC(T) | J-K type flip-flops | 2.0 - 6.0 | CMOS | negative-edge trigger | SOT337-1 | +/- 5.2 | 16 | 77 | low | -40~125 | 156 | 40.0 | SSOP14 | 14 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC73DB | | SOT337-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74HC73DB,118 (9351 902 70118) | HC73 | 74HC73DB |    | week 12, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
| Bulk Pack | Active | 74HC73DB,112 (9351 902 70112) | HC73 | 74HC73DB | | week 12, 2005 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Pin FMEA 74HC/74HCT family 74HC_T_597_Q100
- HC/T User Guide 74HCU04PW
- plastic shrink small outline package; 14 leads; body width 5.3 mm 74LVC32A_Q100
- Footprint for reflow soldering 74HC_T_595_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- Standard product orientation 12NC ending 118 74LVC32A_Q100
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