74HCT109D: Dual JK flip-flop with set and reset; positive-edge trigger
The 74HC/1 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP) inputs, set (SD ) and reset (RD ) inputs; also complementary Q and Q outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the clock input.
The J and K inputs control the state changes of the flip-flops as described in the mode select function table.
The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
The JK design allows operation as a D-type flip-flop by tying the J and K inputs together.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
74HCT109D: Product Block Diagram
sot109-1_3d
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Dual JK flip-flop with set and reset; positive-edge trigger (REV 3.0) PDF (207.0 kB) 74HC_HCT109 [English] | 01 Aug 2016 |
Application Notes (2)
| Name/Description | Modified Date |
|---|---|
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Pin FMEA 74HC/74HCT family (REV 1.0) PDF (51.0 kB) AN11044 [English] | 16 Mar 2011 |
Users Guides (1)
| Name/Description | Modified Date |
|---|---|
| HC/T User Guide (REV 1.0) PDF (508.0 kB) HCT_USER_GUIDE [English] | 01 Nov 1997 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic small outline package; 16 leads; body width 3.9 mm (REV 1.0) PDF (192.0 kB) SOT109-1 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT109D | Active | HC(T) | 4.5 - 5.5 | J-K type flip-flops | TTL | TTL enabled | +/- 4 | SOT109-1 | 17 | 61 | low | -40~125 | 86 | 6.6 | 44 | SO16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT109D | | SOT109-1 | SO-SOJ-REFLOW
SO-SOJ-WAVE SO-SOJ-REFLOW SO-SOJ-WAVE | Reel 13" Q1/T1 CECC | Active | 74HCT109D,653 (9337 149 60653) | 74HCT109D | 74HCT109D |    | week 6, 2004 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
| Bulk Pack, CECC | Active | 74HCT109D,652 (9337 149 60652) | 74HCT109D | 74HCT109D | | week 6, 2004 | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Pin FMEA 74HC/74HCT family 74HC_T_597_Q100
- HC/T User Guide 74HCU04PW
- plastic small outline package; 16 leads; body width 3.9 mm NPIC6C596A_Q100
- Footprint for reflow soldering NPIC6C596A_Q100
- Footprint for wave soldering NPIC6C596A_Q100
- 74HC_T_109
- SA614A
