74LV165DB: 8-bit parallel-in/serial-out shift register
The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL) is LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously. When input PL is HIGH, data enters the register serially at the input DS. It shifts one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the succeeding stage.
The clock input is a gate-OR structure which allows one input to be used as an active LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the input CE should only take place while CP HIGH for predictable operation. Either the CP or the CE should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data when PL is activated.
74LV165DB: Product Block Diagram
Outline 3d SOT338-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 8-bit parallel-in/serial-out shift register (REV 7.0) PDF (211.0 kB) 74LV165 [English] | 09 Mar 2016 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic shrink small outline package; 16 leads; body width 5.3 mm (REV 1.0) PDF (306.0 kB) SOT338-1 [English] | 08 Feb 2016 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV165DB | Active | LV | 1.0 - 5.5 | Shift registers | TTL | 8-bit parallel or serial-in/serial-out shift register | +/- 12 | SOT338-1 | 18 | 78 | 8 | low | -40~125 | 148 | 42.0 | SSOP16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV165DB | | SOT338-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LV165DB,118 (9351 660 30118) | LV165 | 74LV165DB |    | week 12, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
| Bulk Pack | Active | 74LV165DB,112 (9351 660 30112) | LV165 | 74LV165DB | | week 12, 2005 | 144.9 | 10.23 | 9.78E7 | 1 | 1 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- plastic shrink small outline package; 16 leads; body width 5.3 mm 74HC_T_595_Q100
- Footprint for reflow soldering 74HC_T_595_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- 74LV165
- HEF4094B
