74LV4052D: Dual 4-channel analog multiplexer/demultiplexer

The 74LV4052 is a low-voltage CMOS device and is pin and function compatible with the 74HC/HCT4052.

The 74LV4052 is a dual 4-channel analog multiplexer/demultiplexer with a common select logic. Each multiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output (nZ). The common channel select logics include two digital select inputs (S0 and S1) and an active LOW enable input (E). With E LOW, one of the four switches is selected (low impedance ON-state) by S0 and S1. With E HIGH, all switches are in the high impedance OFF-state, independent of S0 and S1. VCC and GND are the supply voltage pins for the digital control inputs (S0, S1 and E). The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (nY0, to nY3, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

74LV4052D: Product Block Diagram
sot109-1_3d
Data Sheets (1)
Name/DescriptionModified Date
Dual 4-channel analog multiplexer/demultiplexer (REV 5.0) PDF (274.0 kB) 74LV4052 [English]17 Mar 2016
Application Notes (1)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Package Information (1)
Name/DescriptionModified Date
plastic small outline package; 16 leads; body width 3.9 mm (REV 1.0) PDF (192.0 kB) SOT109-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
SO16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 4.0) PDF (210.0 kB) SOT109-1_118 [English]24 Apr 2013
Supporting Information (2)
Name/DescriptionModified Date
Footprint for reflow soldering (REV 1.0) PDF (9.0 kB) SO-SOJ-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (8.0 kB) SO-SOJ-WAVE [English]08 Oct 2009
SPICE model
Ordering Information
ProductStatusFamilyConfigurationFunctionDescriptionVCC (V)Logic switching levelsPackage versionRON (Ohm)RON(FLAT) (Ohm)f(-3dB) (MHz)THD (%)Xtalk (dB)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LV4052DActiveLVSP4T-ZAnalog switchesdual single-pole, quad-throw analog switch1.0 - 6.0TTLSOT109-1125151800.4-60very low-40~125783.537SO1616
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LV4052DSOT109-1SO-SOJ-REFLOW SO-SOJ-WAVE
SO-SOJ-REFLOW SO-SOJ-WAVE
Reel 13" Q1/T1Active74LV4052D,118 (9351 758 40118)74LV4052D74LV4052Dweek 6, 2004144.910.239.78E711
Bulk PackActive74LV4052D,112 (9351 758 40112)74LV4052D74LV4052Dweek 6, 2004144.910.239.78E711
Dual 4-channel analog multiplexer/demultiplexer 74LV4052PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
lv Spice model 74LV74PW
plastic small outline package; 16 leads; body width 3.9 mm NPIC6C596A_Q100
Footprint for reflow soldering NPIC6C596A_Q100
Footprint for wave soldering NPIC6C596A_Q100
SO16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... NPIC6C596A_Q100
74LV4052
SA614A