74LVC07APW: Hex buffer with open-drain outputs
The 74LVC07A provides six non-inverting buffers. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
74LVC07APW: Product Block Diagram
Outline 3d SOT402-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Hex buffer with open-drain outputs (REV 5.0) PDF (149.0 kB) 74LVC07A [English] | 27 Oct 2011 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
| Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English] | 05 Feb 2002 |
| Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English] | 08 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
IBIS Model
- lvc07a IBIS model (REV 1.0) ibs LVC07A 4/7/2013
SPICE model
- lvc Spice model (REV 1.0) ZIP LVC 5/7/2013
Ordering Information
| Product | Status | Family | Function | VCC (V) | Logic switching levels | Description | Output drive capability (mA) | Package version | fmax (MHz) | No of bits | tpd (ns) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC07APW | Active | LVC | Buffers/inverters/drivers | 1.65 - 5.5 | CMOS/LVTTL | open-drain | 32 | SOT402-1 | 175 | 6 | 2.2 | low | -40~125 | 143 | 8.66453982300885 | 70.1204159292035 | TSSOP14 | 14 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC07APW | | SOT402-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LVC07APW,118 (9352 654 82118) | LVC07A | 74LVC07APW |    | week 10, 2005 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
| Bulk Pack | Active | 74LVC07APW,112 (9352 654 82112) | LVC07A | 74LVC07APW | | week 10, 2005 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
- Hex buffer with open-drain outputs 74LVC07APW
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Pin FMEA for LVC family 74LVC1G123_Q100
- Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
- Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
- lvc07a IBIS model 74LVC07APW
- lvc Spice model 74LVC3G17GT
- plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
- 74LVC07A
- 74LV164
