74LVC139PW: Dual 2-to-4 line decoder/demultiplexer

The 74LVC139 is a dual 2-to-4 line decoder/demultiplexer. It has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive outputs (nY0 to nY3) that are LOW when selected. Each decoder has an active LOW input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application.

74LVC139PW: Product Block Diagram
Outline 3d SOT403-1
Data Sheets (1)
Name/DescriptionModified Date
Dual 2-to-4 line decoder/demultiplexer (REV 5.0) PDF (162.0 kB) 74LVC139 [English]19 Oct 2011
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 16 leads; body width 4.4 mm (REV 1.0) PDF (300.0 kB) SOT403-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (218.0 kB) SOT403-1_118 [English]08 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS Model
SPICE model
Ordering Information
ProductStatusFamilyFunctionVCC (V)Logic switching levelsDescriptionPackage versionOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC139PWActiveLVCDecoders/demultiplexers1.2 - 3.6CMOS/LVTTLdual 2-to-4 line decoder/demultiplexerSOT403-1+/- 242.5low-40~1251275.056.8TSSOP1616
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC139PWSOT403-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1Active74LVC139PW,118 (9351 960 10118)LVC13974LVC139PWweek 10, 2005123.83.872.58E811
Bulk PackActive74LVC139PW,112 (9351 960 10112)LVC13974LVC139PWweek 10, 2005123.83.872.58E811
Dual 2-to-4 line decoder/demultiplexer 74LVC139PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
lvc139 IBIS model 74LVC139PW
lvc Spice model 74LVC3G17GT
SOT403-1 LPC812M101JDH16
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
Reel 13" Q1/T1 LPC812M101JDH16
74LVC139
PCA9633