74LVC14APW: Hex inverting Schmitt trigger with 5 V tolerant input

The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as a translator in mixed 3.3 V and 5 V applications.

74LVC14APW: Product Block Diagram
Outline 3d SOT402-1
Data Sheets (1)
Name/DescriptionModified Date
Hex inverting Schmitt trigger with 5 V tolerant input (REV 6.0) PDF (147.0 kB) 74LVC14A [English]10 Jun 2016
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English]08 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS Model
SPICE model
Ordering Information
ProductStatusFamilyFunctionVCC (V)Logic switching levelsDescriptionPackage versionOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC14APWActiveLVCSchmitt-triggers1.2 - 3.6CMOS/LVTTLhex inverter Schmitt-triggerSOT402-1+/- 243.21756low-40~1251428.0606371681415968.0986548672566TSSOP1414
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC14APWSOT402-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1Active74LVC14APW,118 (9352 607 39118)LVC14A74LVC14APWweek 10, 2005123.83.872.58E811
Bulk PackActive74LVC14APW,112 (9352 607 39112)LVC14A74LVC14APWweek 10, 2005123.83.872.58E811
Hex inverting Schmitt trigger with 5 V tolerant input 74LVC14APW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
lvc14a IBIS model 74LVC14APW
lvc Spice model 74LVC3G17GT
plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
74LVT14
74LV164