74LVC1G00GW: Single 2-input NAND-gate

The 74LVC1G00 provides the single 2-input NAND function.

Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

74LVC1G00GW: Product Block Diagram
Outline 3d SOT353-1
Data Sheets (1)
Name/DescriptionModified Date
Single 2-input NAND-gate (REV 10.0) PDF (347.0 kB) 74LVC1G00 [English]02 Jul 2012
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]30 Dec 2010
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 5 leads; body width 1.25 mm (REV 1.0) PDF (223.0 kB) SOT353-1 [English]08 Feb 2016
Packing (2)
Name/DescriptionModified Date
TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... (REV 1.0) PDF (257.0 kB) SOT353-1_125 [English]15 May 2013
TSSOP5; Reel pack; SMD; Q3 Reverse product orientation; Orderable part number ending, 165 or Z; Ordering code (12NC)... (REV 1.0) PDF (253.0 kB) SOT353-1_165 [English]15 May 2013
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT353 Topmark (REV 1.0) PDF (103.0 kB) MAR_SOT353 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyFunctionVCC (V)Logic switching levelsTypeDescriptionOutput drive capability (mA)Package versiontpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC1G00GWActiveLVCNAND gates1.65 - 5.5CMOS/LVTTLNAND gatessingle 2-input NAND gate+/- 32SOT353-12.21751low-40~12531180.9181TSSOP55
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC1G00GWSOT353-1Reel 7" Q3/T4, ReverseActive74LVC1G00GW,125 (9352 683 78125)VA74LVC1G00GWweek 36, 2003123.83.872.58E811
Reel 13" Q3/T4 in LargePack, ReverseWithdrawn74LVC1G00GW,165 (9352 683 78165)VA74LVC1G00GWweek 36, 2003123.83.872.58E811
Single 2-input NAND-gate 74LVC1G00GX
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
MicroPak soldering information NTS0102_Q100
PicoGate Logic footprints NX3L4684
MAR_SOT353 Topmark 74LVC1G17_Q100
74LVC1G00 IBIS model 74LVC1G00GX
plastic thin shrink small outline package; 5 leads; body width 1.25 mm 74LVC1G17_Q100
TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... 74LVC1G17_Q100
Reel 13" Q3/T4 in LargePack, Reverse 74AHCT1G86GW
74LVC1G00
XC7SH14