74LVC1G02GV: Single 2-input NOR gate

The 74LVC1G02 provides the single 2-input NOR function.

Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

74LVC1G02GV: Product Block Diagram
Outline 3d SOT753
Data Sheets (1)
Name/DescriptionModified Date
Single 2-input NOR gate (REV 11.0) PDF (347.0 kB) 74LVC1G02 [English]29 Jun 2012
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]30 Dec 2010
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Package Information (1)
Name/DescriptionModified Date
plastic surface-mounted package; 5 leads (REV 1.0) PDF (243.0 kB) SOT753 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
Tape reel SMD; reversed product orientation 12NC ending 125 (REV 1.0) PDF (186.0 kB) SOT753_125 [English]29 Nov 2012
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT753 Topmark (REV 1.0) PDF (89.0 kB) MAR_SOT753 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionTypeOutput drive capability (mA)Package versiontpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC1G02GVActiveLVC1.65 - 5.5NOR gatesCMOS/LVTTLsingle 2-input NOR gateNOR gates+/- 32SOT7532.11501low-40~12527063.3169TSOP55
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC1G02GVSOT753Reel 7" Q3/T4, ReverseActive74LVC1G02GV,125 (9352 720 25125)V0274LVC1G02GVweek 36, 2003123.83.872.58E811
Single 2-input NOR gate 74LVC1G02GX
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
MicroPak soldering information NTS0102_Q100
PicoGate Logic footprints NX3L4684
MAR_SOT753 Topmark 74LVC1G17_Q100
74LVC1G02 IBIS model 74LVC1G02GX
plastic surface-mounted package; 5 leads 74LVC1G17_Q100
Tape reel SMD; reversed product orientation 12NC ending 125 74LVC1G17_Q100
74LVC1G02
BAP70Q