The 74LVC1G08 provides one 2-input AND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Name/Description | Modified Date |
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Single 2-input AND gate (REV 10.0) PDF (349.0 kB) 74LVC1G08 [English] | 29 Jun 2012 |
Name/Description | Modified Date |
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Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English] | 30 Dec 2010 |
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English] | 30 Oct 2002 |
Name/Description | Modified Date |
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plastic surface-mounted package; 5 leads (REV 1.0) PDF (245.0 kB) SOT353 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
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Tape reel SMD; standard product orientation 12NC ending 115 (REV 1.0) PDF (191.0 kB) SOT353_115 [English] | 16 Nov 2012 |
Tape reel SMD; reversed product orientation 12NC ending 125 (REV 1.0) PDF (191.0 kB) SOT353_125 [English] | 16 Nov 2012 |
Name/Description | Modified Date |
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Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
Wave Soldering Profile (REV 1.0) PDF (20.0 kB) WAVE_SOLDERING_PROFILE [English] | 30 Sep 2013 |
MAR_SOT353 Topmark (REV 1.0) PDF (103.0 kB) MAR_SOT353 [English] | 03 Jun 2013 |
Product | Status | Family | Function | VCC (V) | Logic switching levels | Type | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74LVC1G08GW | Active | LVC | AND gates | 1.65 - 5.5 | CMOS / LVTTL | AND gates | single 2-input AND gate | +/- 24 | SOT353-1 | 2.1 | 150 | 1 | low | -40~125 | 311 | 80.9 | 181 | TSSOP5 | 5 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74LVC1G08GW | SOT353 | Reflow_Soldering_Profile
Wave_Soldering_Profile Reflow_Soldering_Profile Wave_Soldering_Profile | Reel 7" Q3/T4, Reverse | Active | 74LVC1G08GW,125 (9352 683 80125) | VE | 74LVC1G08GW | week 36, 2003 | 123.8 | 3.87 | 2.58E8 | 1 | 1 | ||
Reel 13" Q3/T4 in LargePack, Reverse | Withdrawn | 74LVC1G08GW,165 (9352 683 80165) | VE | 74LVC1G08GW | week 36, 2003 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |