74LVC1G14GS: Single Schmitt-trigger inverter

The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the input makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

sot1202_3d
Data Sheets (1)
Name/DescriptionModified Date
Single Schmitt-trigger inverter (REV 13.0) PDF (241.0 kB) 74LVC1G14 [English]15 Mar 2016
Application Notes (4)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
MicroPak soldering information (REV 2.0) PDF (245.0 kB) AN10343 [English]30 Dec 2010
Package Information (1)
Name/DescriptionModified Date
XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm (REV 1.0) PDF (192.0 kB) SOT1202 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
Reversed product orientation 12NC ending 132 (REV 2.0) PDF (92.0 kB) SOT1202_132 [English]04 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT1202 Topmark (REV 1.0) PDF (49.0 kB) MAR_SOT1202 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyFunctionVCC (V)DescriptionLogic switching levelsOutput drive capability (mA)Package versionfmax (MHz)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC1G14GSActiveLVCSchmitt-triggers1.65 - 5.5single inverter Schmitt-triggerCMOS/LVTTL+/- 32SOT120217531low-40~12534134.6231XSON66
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC1G14GSSOT1202Reel 7" Q1/T1, Q3/T4Active74LVC1G14GS,132 (9352 929 03132)VF74LVC1G14GSAlways Pb-free123.83.872.58E811
Single Schmitt-trigger inverter 74LVC1G14GX
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
MicroPak soldering information NTS0102_Q100
MAR_SOT1202 Topmark NCX2200GS
74LVC1G14 IBIS model 74LVC1G14GX
XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm NCX2200GS
Reversed product orientation 12NC ending 132 NTS0101
74LVC2G17